From 27ec8ff893e053affd1478d9e7488c9c5bf39549 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Sat, 18 Dec 2021 10:08:52 -0800
Subject: [PATCH] Shared ALU mux input for shifts

---
 wally-pipelined/src/ieu/alu.sv     |  5 ++---
 wally-pipelined/src/ieu/shifter.sv | 18 +++++++-----------
 2 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/wally-pipelined/src/ieu/alu.sv b/wally-pipelined/src/ieu/alu.sv
index 1d49bb401..a2aa1a446 100644
--- a/wally-pipelined/src/ieu/alu.sv
+++ b/wally-pipelined/src/ieu/alu.sv
@@ -69,13 +69,12 @@ module alu #(parameter WIDTH=32) (
   // Select appropriate ALU Result
   assign ALUFunct = Funct3 & {3{ALUOp}}; // Force ALUFunct to 0 to Add when ALUOp = 0
   always_comb
-    case (ALUFunct)
+    casez (ALUFunct)
       3'b000: FullResult = Sum;       // add or sub
-      3'b001: FullResult = Shift;     // sll
+      3'b?01: FullResult = Shift;     // sll, sra, or srl
       3'b010: FullResult = SLT;       // slt
       3'b011: FullResult = SLTU;      // sltu
       3'b100: FullResult = A ^ B;     // xor
-      3'b101: FullResult = Shift;     // sra or srl
       3'b110: FullResult = A | B;     // or 
       3'b111: FullResult = A & B;     // and
     endcase
diff --git a/wally-pipelined/src/ieu/shifter.sv b/wally-pipelined/src/ieu/shifter.sv
index de7377a70..fc170e75a 100644
--- a/wally-pipelined/src/ieu/shifter.sv
+++ b/wally-pipelined/src/ieu/shifter.sv
@@ -27,20 +27,16 @@
 
 module shifter (
   input  logic [`XLEN-1:0] a,
-  input  logic [5:0]       amt,
+  input  logic [`LOG_XLEN-1:0]       amt,
   input  logic             right, arith, w64,
   output logic [`XLEN-1:0] y);
 
-  localparam BITS = $clog2(`XLEN);
-
   logic [2*`XLEN-2:0]      z, zshift;
-  logic [BITS-1:0]         amttrunc, offset;
+  logic [`LOG_XLEN-1:0]    amttrunc, offset;
 
-  // The best shifter architecture differs based on `XLEN.
-  // for RV32, only 32-bit shifts are needed.  These are 
-  // most efficiently implemented with a funnel shifter.  
-  // For RV64, 32 and 64-bit shifts are needed, with sign
-  // extension.
+  // Handle left and right shifts with a funnel shifter.
+  // For RV32, only 32-bit shifts are needed.   
+  // For RV64, 32 and 64-bit shifts are needed, with sign extension.
 
   // funnel shifter input (see CMOS VLSI Design 4e Section 11.8.1, note Table 11.11 shift types wrong)
   generate
@@ -50,7 +46,7 @@ module shifter (
           if (arith) z = {{31{a[31]}}, a};
           else       z = {31'b0, a};
         else         z = {a, 31'b0};
-      assign amttrunc = amt[4:0]; // shift amount
+      assign amttrunc = amt; // shift amount
     end else begin:shifter  // RV64
       always_comb  // funnel mux
         if (w64) begin // 32-bit shifts
@@ -64,7 +60,7 @@ module shifter (
             else       z = {63'b0, a};
           else         z = {a, 63'b0};         
         end
-      assign amttrunc = w64 ? {1'b0, amt[4:0]} : amt[5:0]; // 32 or 64-bit shift
+      assign amttrunc = w64 ? {1'b0, amt[4:0]} : amt; // 32 or 64-bit shift
     end
   endgenerate