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https://github.com/openhwgroup/cvw
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Fixed sumtest reference output; added embench benchmark directory
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Subproject commit 261a65e0a2d3e8d62d81b1d8fe7e309a096bc6a9
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Subproject commit 4530b3aef3b25f5001dddb884b77f8ccfba1dca6
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benchmarks/embench/Makefile
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benchmarks/embench/Makefile
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# Makefile added 1/20/22 David_Harris@hmc.edu
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# Compile Embench for Wally
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all: Makefile
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../../addins/embench-iot/build_all.py --arch riscv32 --chip generic --board ri5cyverilator --cflags "-O2 -march=rv32i -mabi=ilp32 -mcmodel=medany" --cc riscv64-unknown-elf-gcc
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./benchmark_size.py
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./benchmark_speed.py
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# view with
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# more `ls -t | head -1`
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# --cflags "-O2 -g -nostartfiles"
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#riscv64-unknown-elf-gcc -O2 -g -nostartfiles -I/home/harris/riscv-wally/addins/embench-iot/support -I/home/harris/riscv-wally/addins/embench-iot/config/riscv32/boards/ri5cyverilator -I/home/harris/riscv-wally/addins/embench-iot/config/riscv32/chips/generic -I/home/harris/riscv-wally/addins/embench-iot/config/riscv32 -DCPU_MHZ=1 -DWARMUP_HEAT=1 -o main.o /home/harris/riscv-wally/addins/embench-iot/support/main.c
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benchmarks/embench/Makefile~
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benchmarks/embench/Makefile~
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# Makefile added 1/20/22 David_Harris@hmc.edu
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# Compile Embench for Wally
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all: Makefile
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./build_all.py --arch riscv32 --chip generic --board ri5cyverilator --cc riscv64-unknown-elf-gcc
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./benchmark_size.py
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./benchmark_speed.py
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setup.sh
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setup.sh
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# David_Harris@hmc.edu and kekim@hmc.edu 1 December 2021
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# David_Harris@hmc.edu and kekim@hmc.edu 1 December 2021
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# Set up tools for riscv-wally
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# Set up tools for riscv-wally
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echo "Executing wally-setup.sh"
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echo "Executing Wally setup.sh"
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# Path to RISC-V Tools
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# Path to RISC-V Tools
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export RISCV=/opt/riscv # change this if you installed the tools in a different location
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export RISCV=/opt/riscv # change this if you installed the tools in a different location
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