mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
remove old testvector-generation folder
This commit is contained in:
bbracker
parent
34d44772d5
commit
2588055644
@ -1,13 +0,0 @@
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SHELL = /bin/sh
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CFLAG = -Wall -g
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CC = clang
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all: fixBinMem
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fixBinMem: fixBinMem.c
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${CC} ${CFLAGS} fixBinMem.c -o fixBinMem
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chmod +x fixBinMem
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clean:
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-rm -f fixBinMem
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@ -1,57 +0,0 @@
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#! /usr/bin/python3
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import sys,os
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import matplotlib.pyplot as plt
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import matplotlib.animation as animation
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import matplotlib.ticker as ticker
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# Argument Parsing
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if len(sys.argv) != 4:
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sys.exit('Error analyzeTrace.py expects 3 args:\n <trace> <addresses> <labels>')
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traceFile = sys.argv[1]
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addressFile = sys.argv[2]
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labelFile = sys.argv[3]
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if not os.path.exists(traceFile):
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sys.exit('Error trace file '+traceFile+'not found')
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if not os.path.exists(addressFile):
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sys.exit('Error address file '+addressFile+'not found')
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if not os.path.exists(labelFile):
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sys.exit('Error label file '+labelFile+'not found')
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print('Loading labels')
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funcList=[]
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with open(addressFile, 'r') as addresses, open(labelFile, 'r') as labels:
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for address, label in zip(addresses, labels):
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funcList.append([int(address.strip('\n'),16),label.strip('\n'),0])
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def lookupAdr(address):
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labelCount = len(funcList)
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guessIndex = labelCount
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guessAdr = funcList[guessIndex-1][0]
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if address < funcList[0][0]:
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return 0
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while (address < guessAdr):
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guessIndex-=1
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if guessIndex == -1:
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return 0
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guessAdr=funcList[guessIndex][0]
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funcList[guessIndex][2] += 1
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#print(funcList[guessIndex][1])
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return 1
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print('Parsing trace')
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with open(traceFile, 'r') as trace:
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iCount = 0
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for l in trace:
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lookupAdr(int(l.split(' ')[0],16))
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iCount += 1
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if (iCount % 1e5==0):
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print('Reached '+str(iCount/1e6)+' million instructions')
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print('Sorting by function frequency')
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funcListSorted = sorted(funcList, key=lambda labelEntry: -labelEntry[2])
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with open('traceAnalysis.txt','w') as outFile:
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outFile.write('Virtual Address \t'+('%-50s'%'Function')+'Occurences\n')
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for labelEntry in funcListSorted:
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addr = '%x' % labelEntry[0]
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outFile.write(addr+'\t'+('%-50s' % labelEntry[1])+str(labelEntry[2])+'\n')
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print('Logged results to traceAnalysis.txt')
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@ -1 +0,0 @@
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./analyzeTrace.py ../linux-testvectors/all.txt ../linux-testvectors/vmlinux.objdump.addr ../linux-testvectors/vmlinux.objdump.lab
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@ -1,5 +0,0 @@
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for index in {89..181}
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do
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instrs=$(($index*1000000))
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echo "y" | nice -n 5 ./genCheckpoint.sh $instrs
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done
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@ -1,68 +0,0 @@
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#! /usr/bin/python3
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instrs = 0
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def readBlock(f, start, end):
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l = f.readline()
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if not l:
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quit()
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while not (l.startswith(start) and 'in ' not in l):
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l = f.readline()
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if not l:
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quit()
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ret = l
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while not l.startswith(end):
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l = f.readline()
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if not l:
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quit()
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ret += l
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return ret.split('\n'), f.readline()
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with open('gdbcombined.txt', 'w') as out:
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with open('/mnt/scratch/riscv_gp/riscv_gp.txt', 'r') as gp:
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with open('/mnt/scratch/riscv_sp1/riscv_sp1.txt', 'r') as sp1:
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with open('/mnt/scratch/riscv_sp2/riscv_sp2.txt', 'r') as sp2:
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with open('/mnt/scratch/riscv_sp3/riscv_sp3.txt', 'r') as sp3:
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with open('/mnt/scratch/riscv_decodepc_threads/riscv_decodepc.txt.disassembly', 'r') as inst:
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inst.readline()
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while(True):
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instrs += 1
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g, i1 = readBlock(gp, 'ra', 't6')
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p1, i2 = readBlock(sp1, 'mie', 'scounteren')
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p2, i3 = readBlock(sp2, '0x', 'mideleg')
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p3, i4 = readBlock(sp3, 'mcause', 'stvec')
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instr = inst.readline()
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if not instr:
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quit()
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while '...' in instr:
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instr = inst.readline()
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if not instr:
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quit()
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if i1 != i2 or i2 != i3 or i3 != i4 or int(p2[0].split()[0].split(':')[0], 16) != int(instr.split()[0].split(':')[0], 16):
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print("error: PC was not the same")
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print("instruction {}".format(instrs))
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print(i1)
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print(i2)
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print(i3)
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print(i4)
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print(p2[0])
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print(instr)
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quit()
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if "unimp" in instr:
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instrs -= 1
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continue
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out.write('=> {}'.format(instr.split(':')[2][1:].replace(' ', ':\t', 1)))
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out.write(p2[0] + '\n')
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out.write("zero 0x0 0\n")
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out.write("\n".join(g))
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pc = p2[0].split()[0]
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if pc.endswith(':'):
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pc = pc[:-1]
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out.write("pc {} {}\n".format(pc, pc))
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out.write("\n".join(p1))
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out.write("\n".join(p3))
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out.write("\n".join(p2[2:]))
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out.write("-----\n")
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if instrs % 10000 == 0:
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print(instrs)
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#if instrs >= 1000010:
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# quit()
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@ -1,24 +0,0 @@
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define debug
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# Arguments
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set $tcpPort=$arg0
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# GDB config
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set pagination off
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set logging overwrite on
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set logging redirect on
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set confirm off
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# Connect to QEMU session
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eval "target extended-remote :%d",$tcpPort
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# Symbol Files
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file ../buildroot-image-output/vmlinux
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# Run until Linux login prompt
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b do_idle
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ignore 1 2
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c
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kill
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q
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end
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@ -1,21 +0,0 @@
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#!/bin/bash
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source genSettings.sh
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tcpPort=1237
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# Run without GDB
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($customQemu \
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-M virt \
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-m 128M \
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-nographic \
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-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
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-singlestep -rtc clock=vm -icount shift=1,align=off,sleep=on)
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# Run with GDB
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#($customQemu \
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#-M virt \
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#-nographic -serial /dev/null \
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#-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
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#-singlestep -rtc clock=vm -icount shift=1,align=off,sleep=on \
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#-gdb tcp::$tcpPort -S) \
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#& riscv64-unknown-elf-gdb -x debug.gdb -ex "debug $tcpPort"
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Binary file not shown.
@ -1,33 +0,0 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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int main(int argc, char *argv[]) {
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if (argc < 3){
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fprintf(stderr, "Expected 2 arguments: <raw GDB dump> <output binary>\n");
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exit(1);
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}
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char* rawGDBfilePath = argv[1];
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FILE* rawGDBfile;
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if ((rawGDBfile = fopen(rawGDBfilePath,"rb"))==NULL) {
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fprintf(stderr, "File not found: %s\n",rawGDBfilePath);
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exit(1);
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}
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char* outFilePath = argv[2];
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FILE* outFile = fopen(outFilePath,"w");
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uint64_t qemuWord;
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uint64_t verilogWord;
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int bytesReturned=0;
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do {
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bytesReturned=fread(&qemuWord, 8, 1, rawGDBfile);
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verilogWord = (((qemuWord>>0 )&0xff)<<56 |
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((qemuWord>>8 )&0xff)<<48 |
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((qemuWord>>16)&0xff)<<40 |
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((qemuWord>>24)&0xff)<<32 |
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((qemuWord>>32)&0xff)<<24 |
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((qemuWord>>40)&0xff)<<16 |
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((qemuWord>>48)&0xff)<<8 |
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((qemuWord>>56)&0xff)<<0);
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fwrite(&verilogWord, 8, 1, outFile);
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} while(bytesReturned!=0);
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return 0;
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}
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@ -1,15 +0,0 @@
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#! /usr/bin/python3
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import sys,os
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if len(sys.argv) != 3:
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sys.exit('Error fix_mem.py expects 2 args:\n fix_mem.py <input filename> <output filename>')
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inputFile = sys.argv[1]
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outputFile = sys.argv[2]
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if not os.path.exists(inputFile):
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sys.exit('Error input file '+inputFile+' not found')
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print('Begin translating '+os.path.basename(inputFile)+' to '+os.path.basename(outputFile))
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with open(inputFile, 'r') as f:
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with open(outputFile, 'w') as w:
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for l in f:
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w.write(f'{"".join([x[2:] for x in l.split()[:0:-1]])}\n')
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print('Finished translating '+os.path.basename(inputFile)+' to '+os.path.basename(outputFile)+'!')
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@ -1,53 +0,0 @@
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define genCheckpoint
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# GDB config
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set pagination off
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set logging overwrite on
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set logging redirect on
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set confirm off
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# Argument Parsing
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set $tcpPort=$arg0
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set $instrCount=$arg1
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set $statePath=$arg2
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set $ramPath=$arg2
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set $checkPC=$arg3
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set $checkPCoccurences=$arg4
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eval "set $statePath = \"%s/stateGDB.txt\"", $statePath
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eval "set $ramPath = \"%s/ramGDB.bin\"", $ramPath
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# Connect to QEMU session
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eval "target extended-remote :%d",$tcpPort
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# QEMU Config
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maintenance packet Qqemu.PhyMemMode:1
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# Symbol file
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file ../buildroot-image-output/vmlinux
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# Step over reset vector into actual code
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stepi 100
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# Set breakpoint for where to stop
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b do_idle
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# Proceed to checkpoint
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printf "GDB proceeding to checkpoint at %d instrs\n", $instrCount
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#stepi $instrCount-1000
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eval "b *0x%s",$checkPC
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ignore 2 $checkPCoccurences
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c
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printf "Reached checkpoint at %d instrs\n", $instrCount
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# Log all registers to a file
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printf "GDB storing state to %s\n", $statePath
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eval "set logging file %s", $statePath
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set logging on
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info all-registers
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set logging off
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|
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# Log main memory to a file
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printf "GDB storing RAM to %s\n", $ramPath
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eval "dump binary memory %s 0x80000000 0xffffffff", $ramPath
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|
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kill
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q
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end
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@ -1,60 +0,0 @@
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#!/bin/bash
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|
|
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source genSettings.sh
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tcpPort=1236
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|
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|
|
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# Parse Commandline Arg
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|
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if [ "$#" -ne 1 ]; then
|
|
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echo "genCheckpoint requires 1 argument: <num instrs>" >&2
|
|
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exit 1
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|
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fi
|
|
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instrs=$1
|
|
||||||
if ! [ "$instrs" -eq "$instrs" ] 2> /dev/null
|
|
||||||
then
|
|
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echo "Error expected integer number of instructions, got $instrs" >&2
|
|
||||||
exit 1
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|
||||||
fi
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|
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checkOutDir="$outDir/checkpoint$instrs"
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|
||||||
checkIntermedDir="$checkOutDir/intermediate-outputs"
|
|
||||||
|
|
||||||
read -p "This scripts is going to create a checkpoint at $instrs instrs.
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|
||||||
Is that what you wanted? (y/n) " -n 1 -r
|
|
||||||
echo
|
|
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if [[ $REPLY =~ ^[Yy]$ ]]
|
|
||||||
then
|
|
||||||
echo "Creating checkpoint at $instrs instructions!"
|
|
||||||
mkdir -p $checkOutDir
|
|
||||||
mkdir -p $checkIntermedDir
|
|
||||||
|
|
||||||
# Identify instruction in trace
|
|
||||||
instr=$(sed "${instrs}q;d" "../linux-testvectors/all.txt")
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|
||||||
echo "Found ${instrs}th instr: ${instr}"
|
|
||||||
pc=$(echo $instr | cut -d " " -f1)
|
|
||||||
asm=$(echo $instr | cut -d " " -f2)
|
|
||||||
occurences=$(($(head -$instrs "../linux-testvectors/all.txt" | grep -c "${pc} ${asm}")-1))
|
|
||||||
echo "It occurs ${occurences} times before the ${instrs}th instr."
|
|
||||||
|
|
||||||
# GDB+QEMU
|
|
||||||
echo "Starting QEMU with attached GDB script at $(date +%H:%M:%S)"
|
|
||||||
($customQemu \
|
|
||||||
-M virt \
|
|
||||||
-nographic \
|
|
||||||
-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
|
|
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-singlestep -rtc clock=vm -icount shift=1,align=off,sleep=on,rr=replay,rrfile="$intermedDir/$recordFile" \
|
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-gdb tcp::$tcpPort -S) \
|
|
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& riscv64-unknown-elf-gdb --quiet \
|
|
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-x genCheckpoint.gdb -ex "genCheckpoint $tcpPort $instrs \"$checkIntermedDir\" \"$pc\" $occurences"
|
|
||||||
echo "Completed GDB script completed at $(date +%H:%M:%S)"
|
|
||||||
|
|
||||||
# Post-Process GDB outputs
|
|
||||||
./parseState.py "$checkOutDir"
|
|
||||||
echo "Changing Endianness at $(date +%H:%M:%S)"
|
|
||||||
make
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|
||||||
./fixBinMem "$checkIntermedDir/ramGDB.bin" "$checkOutDir/ram.bin"
|
|
||||||
echo "Creating truncated trace at $(date +%H:%M:%S)"
|
|
||||||
tail -n+$instrs "$outDir/$traceFile" > "$checkOutDir/$traceFile"
|
|
||||||
echo "Checkpoint completed at $(date +%H:%M:%S)"
|
|
||||||
else
|
|
||||||
echo "You can change the number of instructions by editing the \"instrs\" variable in this script."
|
|
||||||
echo "Have a nice day!"
|
|
||||||
fi
|
|
||||||
@ -1,44 +0,0 @@
|
|||||||
define genInitMem
|
|
||||||
# GDB config
|
|
||||||
set pagination off
|
|
||||||
set logging overwrite on
|
|
||||||
set logging redirect on
|
|
||||||
set confirm off
|
|
||||||
|
|
||||||
# Argument Parsing
|
|
||||||
set $tcpPort=$arg0
|
|
||||||
set $bootmemPath=$arg1
|
|
||||||
set $untrimmedBootmemPath=$arg1
|
|
||||||
set $ramPath=$arg1
|
|
||||||
eval "set $bootmemPath = \"%s/bootmemGDB.txt\"", $bootmemPath
|
|
||||||
eval "set $untrimmedBootmemPath = \"%s/untrimmedBootmemGDB.txt\"", $untrimmedBootmemPath
|
|
||||||
eval "set $ramPath = \"%s/ramGDB.txt\"", $ramPath
|
|
||||||
|
|
||||||
# Connect to QEMU session
|
|
||||||
eval "target extended-remote :%d",$tcpPort
|
|
||||||
|
|
||||||
# QEMU Config
|
|
||||||
maintenance packet Qqemu.PhyMemMode:1
|
|
||||||
|
|
||||||
printf "Creating %s\n",$bootmemPath
|
|
||||||
eval "set logging file %s", $bootmemPath
|
|
||||||
set logging on
|
|
||||||
x/4096xb 0x1000
|
|
||||||
set logging off
|
|
||||||
|
|
||||||
printf "Creating %s\n",$untrimmedBootmemPath
|
|
||||||
printf "Warning - please verify that the second half of %s is all 0s\n",$untrimmedBootmemPath
|
|
||||||
eval "set logging file %s", $untrimmedBootmemPath
|
|
||||||
set logging on
|
|
||||||
x/8192xb 0x1000
|
|
||||||
set logging off
|
|
||||||
|
|
||||||
printf "Creating %s\n", $ramPath
|
|
||||||
eval "set logging file %s", $ramPath
|
|
||||||
set logging on
|
|
||||||
x/134217728xb 0x80000000
|
|
||||||
set logging off
|
|
||||||
|
|
||||||
kill
|
|
||||||
q
|
|
||||||
end
|
|
||||||
@ -1,27 +0,0 @@
|
|||||||
#!/bin/bash
|
|
||||||
|
|
||||||
source genSettings.sh
|
|
||||||
tcpPort=1235
|
|
||||||
|
|
||||||
read -p "Warning: running this script will overwrite the contents of memory dumps needed for simulation.
|
|
||||||
Would you like to proceed? (y/n) " -n 1 -r
|
|
||||||
echo
|
|
||||||
if [[ $REPLY =~ ^[Yy]$ ]]
|
|
||||||
then
|
|
||||||
($customQemu \
|
|
||||||
-M virt \
|
|
||||||
-nographic \
|
|
||||||
-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
|
|
||||||
-gdb tcp::$tcpPort -S 2>/dev/null >/dev/null) \
|
|
||||||
& riscv64-unknown-elf-gdb -quiet -x genInitMem.gdb -ex "genInitMem $tcpPort \"$intermedDir\""
|
|
||||||
|
|
||||||
echo "Translating Mem from GDB to Questa format"
|
|
||||||
./fixTxtMem.py "$intermedDir/bootmemGDB.txt" "$outDir/bootmem.txt"
|
|
||||||
./fixTxtMem.py "$intermedDir/ramGDB.txt" "$outDir/ram.txt"
|
|
||||||
echo "Done"
|
|
||||||
|
|
||||||
echo "Creating debugging objdump of linux image"
|
|
||||||
riscv64-unknown-elf-objdump -D $imageDir/vmlinux > $outDir/vmlinux.objdump
|
|
||||||
extractFunctionRadix.sh $outDir/vmlinux.objdump
|
|
||||||
echo "Done"
|
|
||||||
fi
|
|
||||||
@ -1,11 +0,0 @@
|
|||||||
#!/bin/bash
|
|
||||||
|
|
||||||
# Warning! This is Tera-specific absolute path
|
|
||||||
# *** on the long term we'll want to include QEMU in the addins folder
|
|
||||||
export customQemu="/courses/e190ax/qemu_sim/rv64_initrd/qemu_experimental/qemu/build/qemu-system-riscv64"
|
|
||||||
export imageDir="../buildroot-image-output"
|
|
||||||
export outDir="../linux-testvectors"
|
|
||||||
export intermedDir="$outDir/intermediate-outputs"
|
|
||||||
export traceFile="all.txt"
|
|
||||||
export recordFile="all.qemu"
|
|
||||||
export tcpPort=1234
|
|
||||||
@ -1,24 +0,0 @@
|
|||||||
define genTrace
|
|
||||||
# Arguments
|
|
||||||
set $tcpPort=$arg0
|
|
||||||
|
|
||||||
# GDB config
|
|
||||||
set pagination off
|
|
||||||
set logging overwrite on
|
|
||||||
set logging redirect on
|
|
||||||
set confirm off
|
|
||||||
|
|
||||||
# Connect to QEMU session
|
|
||||||
eval "target extended-remote :%d",$tcpPort
|
|
||||||
|
|
||||||
# Symbol Files
|
|
||||||
file ../buildroot-image-output/vmlinux
|
|
||||||
|
|
||||||
# Run until Linux login prompt
|
|
||||||
b do_idle
|
|
||||||
ignore 1 2
|
|
||||||
c
|
|
||||||
|
|
||||||
kill
|
|
||||||
q
|
|
||||||
end
|
|
||||||
@ -1,24 +0,0 @@
|
|||||||
#!/bin/bash
|
|
||||||
source genSettings.sh
|
|
||||||
tcpPort=1234
|
|
||||||
|
|
||||||
read -p "Warning: running this script will overwrite the contents of:
|
|
||||||
$outDir/$traceFile
|
|
||||||
$outDir/$recordFile
|
|
||||||
Would you like to proceed? (y/n) " -n 1 -r
|
|
||||||
echo
|
|
||||||
if [[ $REPLY =~ ^[Yy]$ ]]
|
|
||||||
then
|
|
||||||
mkdir -p $outDir
|
|
||||||
mkdir -p $intermedDir
|
|
||||||
($customQemu \
|
|
||||||
-M virt \
|
|
||||||
-nographic -serial /dev/null \
|
|
||||||
-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
|
|
||||||
-singlestep -rtc clock=vm -icount shift=1,align=off,sleep=on,rr=record,rrfile="$intermedDir/$recordFile" \
|
|
||||||
-d nochain,cpu,in_asm \
|
|
||||||
-gdb tcp::$tcpPort -S \
|
|
||||||
2>&1 >/dev/null | ./parseQemuToGDB.py | ./parseGDBtoTrace.py | ./remove_dup.awk > "$outDir/$traceFile") \
|
|
||||||
& riscv64-unknown-elf-gdb -quiet -x genTrace.gdb -ex "genTrace $tcpPort"
|
|
||||||
fi
|
|
||||||
|
|
||||||
@ -1,213 +0,0 @@
|
|||||||
#! /usr/bin/python3
|
|
||||||
import sys, fileinput, re
|
|
||||||
|
|
||||||
# Ross Thompson
|
|
||||||
# July 27, 2021
|
|
||||||
# Rewrite of the linux trace parser.
|
|
||||||
|
|
||||||
|
|
||||||
InstrStartDelim = '=>'
|
|
||||||
InstrEndDelim = '-----'
|
|
||||||
|
|
||||||
#InputFile = 'noparse.txt'
|
|
||||||
#InputFile = sys.stdin
|
|
||||||
#InputFile = 'temp.txt'
|
|
||||||
#OutputFile = 'parsedAll.txt'
|
|
||||||
|
|
||||||
HUMAN_READABLE = False
|
|
||||||
|
|
||||||
def toDict(lst):
|
|
||||||
'Converts the list of register values to a dictionary'
|
|
||||||
dct= {}
|
|
||||||
for item in lst:
|
|
||||||
regTup = item.split()
|
|
||||||
dct[regTup[0]] = int(regTup[2], 10)
|
|
||||||
del dct['pc']
|
|
||||||
return dct
|
|
||||||
|
|
||||||
def whichClass(text, Regs):
|
|
||||||
'Which instruction class?'
|
|
||||||
#print(text, Regs)
|
|
||||||
if text[0:2] == 'ld' or text[0:2] == 'lw' or text[0:2] == 'lh' or text[0:2] == 'lb':
|
|
||||||
return ('load', WhatAddr(text, Regs), None, WhatMemDestSource(text))
|
|
||||||
elif text[0:2] == 'sd' or text[0:2] == 'sw' or text[0:2] == 'sh' or text[0:2] == 'sb':
|
|
||||||
return ('store', WhatAddr(text, Regs), WhatMemDestSource(text), None)
|
|
||||||
elif text[0:3] == 'amo':
|
|
||||||
return ('amo', WhatAddrAMO(text, Regs), WhatMemDestSource(text), WhatMemDestSource(text))
|
|
||||||
elif text[0:2] == 'lr':
|
|
||||||
return ('lr', WhatAddrLR(text, Regs), None, WhatMemDestSource(text))
|
|
||||||
elif text[0:2] == 'sc':
|
|
||||||
return ('sc', WhatAddrSC(text, Regs), WhatMemDestSource(text), None)
|
|
||||||
else:
|
|
||||||
return ('other', None, None, None)
|
|
||||||
|
|
||||||
def whatChanged(dct0, dct1):
|
|
||||||
'Compares two dictionaries of instrution registers and indicates which registers changed'
|
|
||||||
dct = {}
|
|
||||||
for key in dct0:
|
|
||||||
if (dct1[key] != dct0[key]):
|
|
||||||
dct[key] = dct1[key]
|
|
||||||
return dct
|
|
||||||
|
|
||||||
def WhatMemDestSource(text):
|
|
||||||
''''What is the destination register. Used to compute where the read data is
|
|
||||||
on a load or the write data on a store.'''
|
|
||||||
return text.split()[1].split(',')[0]
|
|
||||||
|
|
||||||
def WhatAddr(text, Regs):
|
|
||||||
'What is the data memory address?'
|
|
||||||
Imm = text.split(',')[1]
|
|
||||||
(Imm, Src) = Imm.split('(')
|
|
||||||
Imm = int(Imm.strip(), 10)
|
|
||||||
Src = Src.strip(')').strip()
|
|
||||||
RegVal = Regs[Src]
|
|
||||||
return Imm + RegVal
|
|
||||||
|
|
||||||
def WhatAddrAMO(text, Regs):
|
|
||||||
'What is the data memory address?'
|
|
||||||
Src = text.split('(')[1]
|
|
||||||
Src = Src.strip(')').strip()
|
|
||||||
return Regs[Src]
|
|
||||||
|
|
||||||
def WhatAddrLR(text, Regs):
|
|
||||||
'What is the data memory address?'
|
|
||||||
Src = text.split('(')[1]
|
|
||||||
Src = Src.strip(')').strip()
|
|
||||||
return Regs[Src]
|
|
||||||
|
|
||||||
def WhatAddrSC(text, Regs):
|
|
||||||
'What is the data memory address?'
|
|
||||||
Src = text.split('(')[1]
|
|
||||||
Src = Src.strip(')').strip()
|
|
||||||
return Regs[Src]
|
|
||||||
|
|
||||||
def PrintInstr(instr, fp):
|
|
||||||
if instr[2] == None:
|
|
||||||
return
|
|
||||||
ChangedRegisters = instr[4]
|
|
||||||
GPR = ''
|
|
||||||
CSR = []
|
|
||||||
for key in ChangedRegisters:
|
|
||||||
# filter out csr which are not checked.
|
|
||||||
if(key in RegNumber):
|
|
||||||
if(RegNumber[key] < 32):
|
|
||||||
# GPR
|
|
||||||
if(HUMAN_READABLE):
|
|
||||||
GPR = '{:-2d} {:016x}'.format(RegNumber[key], ChangedRegisters[key])
|
|
||||||
else:
|
|
||||||
GPR = '{:d} {:x}'.format(RegNumber[key], ChangedRegisters[key])
|
|
||||||
else:
|
|
||||||
if(HUMAN_READABLE):
|
|
||||||
CSR.extend([key, '{:016x}'.format(ChangedRegisters[key])])
|
|
||||||
else:
|
|
||||||
CSR.extend([key, '{:x}'.format(ChangedRegisters[key])])
|
|
||||||
|
|
||||||
CSRStr = ' '.join(CSR)
|
|
||||||
|
|
||||||
#print(instr)
|
|
||||||
|
|
||||||
if (HUMAN_READABLE == True):
|
|
||||||
fp.write('{:016x} {:08x} {:25s}'.format(instr[0], instr[1], instr[2]))
|
|
||||||
if(len(GPR) != 0):
|
|
||||||
fp.write(' GPR {}'.format(GPR))
|
|
||||||
if(instr[3] == 'load' or instr[3] == 'lr'):
|
|
||||||
fp.write(' MemR {:016x} {:016x} {:016x}'.format(instr[5], 0, instr[7]))
|
|
||||||
if(instr[3] == 'store'):
|
|
||||||
fp.write('\t\t\t MemW {:016x} {:016x} {:016x}'.format(instr[5], instr[6], 0))
|
|
||||||
|
|
||||||
if(len(CSR) != 0):
|
|
||||||
fp.write(' CSR {}'.format(CSRStr))
|
|
||||||
else:
|
|
||||||
fp.write('{:x} {:x} {:s}'.format(instr[0], instr[1], instr[2].replace(' ', '_')))
|
|
||||||
if(len(GPR) != 0):
|
|
||||||
fp.write(' GPR {}'.format(GPR))
|
|
||||||
if(instr[3] == 'load' or instr[3] == 'lr'):
|
|
||||||
fp.write(' MemR {:x} {:x} {:x}'.format(instr[5], 0, instr[7]))
|
|
||||||
if(instr[3] == 'store'):
|
|
||||||
fp.write(' MemW {:x} {:x} {:x}'.format(instr[5], instr[6], 0))
|
|
||||||
|
|
||||||
if(len(CSR) != 0):
|
|
||||||
fp.write(' CSR {}'.format(CSRStr))
|
|
||||||
fp.write('\n')
|
|
||||||
|
|
||||||
# reg number
|
|
||||||
RegNumber = {'zero': 0, 'ra': 1, 'sp': 2, 'gp': 3, 'tp': 4, 't0': 5, 't1': 6, 't2': 7, 's0': 8, 's1': 9, 'a0': 10, 'a1': 11, 'a2': 12, 'a3': 13, 'a4': 14, 'a5': 15, 'a6': 16, 'a7': 17, 's2': 18, 's3': 19, 's4': 20, 's5': 21, 's6': 22, 's7': 23, 's8': 24, 's9': 25, 's10': 26, 's11': 27, 't3': 28, 't4': 29, 't5': 30, 't6': 31, 'mhartid': 32, 'mstatus': 33, 'mip': 34, 'mie': 35, 'mideleg': 36, 'medeleg': 37, 'mtvec': 38, 'stvec': 39, 'mepc': 40, 'sepc': 41, 'mcause': 42, 'scause': 43, 'mtval': 44, 'stval': 45}
|
|
||||||
# initial state
|
|
||||||
CurrentInstr = ['0', '0', None, 'other', {'zero': 0, 'ra': 0, 'sp': 0, 'gp': 0, 'tp': 0, 't0': 0, 't1': 0, 't2': 0, 's0': 0, 's1': 0, 'a0': 0, 'a1': 0, 'a2': 0, 'a3': 0, 'a4': 0, 'a5': 0, 'a6': 0, 'a7': 0, 's2': 0, 's3': 0, 's4': 0, 's5': 0, 's6': 0, 's7': 0, 's8': 0, 's9': 0, 's10': 0, 's11': 0, 't3': 0, 't4': 0, 't5': 0, 't6': 0, 'mhartid': 0, 'mstatus': 0, 'mip': 0, 'mie': 0, 'mideleg': 0, 'medeleg': 0, 'mtvec': 0, 'stvec': 0, 'mepc': 0, 'sepc': 0, 'mcause': 0, 'scause': 0, 'mtval': 0, 'stval': 0}, {}, None, None, None]
|
|
||||||
|
|
||||||
#with open (InputFile, 'r') as InputFileFP:
|
|
||||||
#lines = InputFileFP.readlines()
|
|
||||||
lineNum = 0
|
|
||||||
StartLine = 0
|
|
||||||
EndLine = 0
|
|
||||||
numInstrs = 0
|
|
||||||
#instructions = []
|
|
||||||
MemAdr = 0
|
|
||||||
lines = []
|
|
||||||
for line in fileinput.input('-'):
|
|
||||||
lines.insert(lineNum, line)
|
|
||||||
if InstrStartDelim in line:
|
|
||||||
lineNum = 0
|
|
||||||
StartLine = lineNum
|
|
||||||
elif InstrEndDelim in line:
|
|
||||||
EndLine = lineNum
|
|
||||||
(InstrBits, text) = lines[StartLine].split(':')
|
|
||||||
InstrBits = int(InstrBits.strip('=> '), 16)
|
|
||||||
text = text.strip()
|
|
||||||
PC = int(lines[StartLine+1].split(':')[0][2:], 16)
|
|
||||||
Regs = toDict(lines[StartLine+2:EndLine])
|
|
||||||
(Class, Addr, WriteReg, ReadReg) = whichClass(text, Regs)
|
|
||||||
#print("CWR", Class, WriteReg, ReadReg)
|
|
||||||
PreviousInstr = CurrentInstr
|
|
||||||
|
|
||||||
Changed = whatChanged(PreviousInstr[4], Regs)
|
|
||||||
|
|
||||||
if (ReadReg !=None): ReadData = ReadReg
|
|
||||||
else: ReadData = None
|
|
||||||
|
|
||||||
if (WriteReg !=None): WriteData = WriteReg
|
|
||||||
else: WriteData = None
|
|
||||||
|
|
||||||
CurrentInstr = [PC, InstrBits, text, Class, Regs, Changed, Addr, WriteData, ReadData]
|
|
||||||
|
|
||||||
#print(CurrentInstr[0:4], PreviousInstr[5], CurrentInstr[6:7], PreviousInstr[8])
|
|
||||||
|
|
||||||
# pc, instrbits, text and class come from the last line.
|
|
||||||
MoveInstrToRegWriteLst = PreviousInstr[0:4]
|
|
||||||
# updated registers come from the current line.
|
|
||||||
MoveInstrToRegWriteLst.append(CurrentInstr[5]) # destination regs
|
|
||||||
# memory address if present comes from the last line.
|
|
||||||
MoveInstrToRegWriteLst.append(PreviousInstr[6]) # MemAdrM
|
|
||||||
# write data from the previous line
|
|
||||||
#MoveInstrToRegWriteLst.append(PreviousInstr[7]) # WriteDataM
|
|
||||||
|
|
||||||
if (PreviousInstr[7] != None):
|
|
||||||
MoveInstrToRegWriteLst.append(Regs[PreviousInstr[7]]) # WriteDataM
|
|
||||||
else:
|
|
||||||
MoveInstrToRegWriteLst.append(None)
|
|
||||||
|
|
||||||
# read data from the current line
|
|
||||||
#MoveInstrToRegWriteLst.append(PreviousInstr[8]) # ReadDataM
|
|
||||||
if (PreviousInstr[8] != None):
|
|
||||||
MoveInstrToRegWriteLst.append(Regs[PreviousInstr[8]]) # ReadDataM
|
|
||||||
else:
|
|
||||||
MoveInstrToRegWriteLst.append(None)
|
|
||||||
|
|
||||||
lines.clear()
|
|
||||||
#instructions.append(MoveInstrToRegWriteLst)
|
|
||||||
PrintInstr(MoveInstrToRegWriteLst, sys.stdout)
|
|
||||||
numInstrs +=1
|
|
||||||
if (numInstrs % 1e4 == 0):
|
|
||||||
sys.stderr.write('Trace parser reached '+str(numInstrs/1.0e6)+' million instrs.\n')
|
|
||||||
sys.stderr.flush()
|
|
||||||
lineNum += 1
|
|
||||||
|
|
||||||
|
|
||||||
#for instruction in instructions[1::]:
|
|
||||||
|
|
||||||
|
|
||||||
#with open(OutputFile, 'w') as OutputFileFP:
|
|
||||||
# print('opened file')
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -1,136 +0,0 @@
|
|||||||
#! /usr/bin/python3
|
|
||||||
import fileinput, sys
|
|
||||||
|
|
||||||
sys.stderr.write("reminder: parse_qemu.py takes input from stdin\n")
|
|
||||||
parseState = "idle"
|
|
||||||
beginPageFault = 0
|
|
||||||
inPageFault = 0
|
|
||||||
endPageFault = 0
|
|
||||||
CSRs = {}
|
|
||||||
pageFaultCSRs = {}
|
|
||||||
regs = {}
|
|
||||||
pageFaultRegs = {}
|
|
||||||
instrs = {}
|
|
||||||
instrCount = 0
|
|
||||||
returnAdr = 0
|
|
||||||
|
|
||||||
def printPC(l):
|
|
||||||
global parseState, inPageFault, CSRs, pageFaultCSRs, regs, pageFaultCSRs, instrs, instrCount
|
|
||||||
if not inPageFault:
|
|
||||||
inst = l.split()
|
|
||||||
if len(inst) > 3:
|
|
||||||
print(f'=> {inst[1]}:\t{inst[2]} {inst[3]}')
|
|
||||||
else:
|
|
||||||
print(f'=> {inst[1]}:\t{inst[2]}')
|
|
||||||
print(f'{inst[0]} 0x{inst[1]}')
|
|
||||||
instrCount += 1
|
|
||||||
if ((instrCount % 100000) == 0):
|
|
||||||
sys.stderr.write("QEMU parser reached "+str(instrCount)+" instrs\n")
|
|
||||||
|
|
||||||
def printCSRs():
|
|
||||||
global parseState, inPageFault, CSRs, pageFaultCSRs, regs, pageFaultCSRs, instrs
|
|
||||||
if not inPageFault:
|
|
||||||
for (csr,val) in CSRs.items():
|
|
||||||
print('{}{}{:#x} {}'.format(csr, ' '*(15-len(csr)), val, val))
|
|
||||||
print('-----')
|
|
||||||
|
|
||||||
def parseCSRs(l):
|
|
||||||
global parseState, inPageFault, CSRs, pageFaultCSRs, regs, pageFaultCSRs, instrs
|
|
||||||
if l.strip() and (not l.startswith("Disassembler")) and (not l.startswith("Please")):
|
|
||||||
# If we've hit the register file
|
|
||||||
if l.startswith(' x0/zero'):
|
|
||||||
parseState = "regFile"
|
|
||||||
if not inPageFault:
|
|
||||||
instr = instrs[CSRs["pc"]]
|
|
||||||
printPC(instr)
|
|
||||||
parseRegs(l)
|
|
||||||
# If we've hit a CSR
|
|
||||||
else:
|
|
||||||
csr = l.split()[0]
|
|
||||||
val = int(l.split()[1],16)
|
|
||||||
# Commented out this conditional because the pageFault instrs don't corrupt CSRs
|
|
||||||
#if inPageFault:
|
|
||||||
# Not sure if these CSRs should be updated or not during page fault.
|
|
||||||
#if l.startswith("mstatus") or l.startswith("mepc") or l.startswith("mcause") or l.startswith("mtval") or l.startswith("sepc") or l.startswith("scause") or l.startswith("stval"):
|
|
||||||
# We do update some CSRs
|
|
||||||
# CSRs[csr] = val
|
|
||||||
#else:
|
|
||||||
# Others we preserve until changed later
|
|
||||||
# pageFaultCSRs[csr] = val
|
|
||||||
#elif pageFaultCSRs and (csr in pageFaultCSRs):
|
|
||||||
# if (val != pageFaultCSRs[csr]):
|
|
||||||
# del pageFaultCSRs[csr]
|
|
||||||
# CSRs[csr] = val
|
|
||||||
#else:
|
|
||||||
# CSRs[csr] = val
|
|
||||||
#
|
|
||||||
# However SEPC and STVAL do get corrupted upon exiting
|
|
||||||
if endPageFault and ((csr == 'sepc') or (csr == 'stval')):
|
|
||||||
CSRs[csr] = returnAdr
|
|
||||||
pageFaultCSRs[csr] = val
|
|
||||||
elif pageFaultCSRs and (csr in pageFaultCSRs):
|
|
||||||
if (val != pageFaultCSRs[csr]):
|
|
||||||
del pageFaultCSRs[csr]
|
|
||||||
CSRs[csr] = val
|
|
||||||
else:
|
|
||||||
CSRs[csr] = val
|
|
||||||
|
|
||||||
def parseRegs(l):
|
|
||||||
global parseState, inPageFault, CSRs, pageFaultCSRs, regs, pageFaultCSRs, instrs, pageFaultRegs
|
|
||||||
if "pc" in l:
|
|
||||||
printCSRs()
|
|
||||||
# New non-disassembled instruction
|
|
||||||
parseState = "CSRs"
|
|
||||||
parseCSRs(l)
|
|
||||||
elif l.startswith('--------'):
|
|
||||||
# End of disassembled instruction
|
|
||||||
printCSRs()
|
|
||||||
parseState = "idle"
|
|
||||||
else:
|
|
||||||
s = l.split()
|
|
||||||
for i in range(0,len(s),2):
|
|
||||||
if '/' in s[i]:
|
|
||||||
reg = s[i].split('/')[1]
|
|
||||||
val = int(s[i+1], 16)
|
|
||||||
if inPageFault:
|
|
||||||
pageFaultRegs[reg] = val
|
|
||||||
else:
|
|
||||||
if pageFaultRegs and (reg in pageFaultRegs):
|
|
||||||
if (val != pageFaultRegs[reg]):
|
|
||||||
del pageFaultRegs[reg]
|
|
||||||
regs[reg] = val
|
|
||||||
else:
|
|
||||||
regs[reg] = val
|
|
||||||
val = regs[reg]
|
|
||||||
print('{}{}{:#x} {}'.format(reg, ' '*(15-len(reg)), val, val))
|
|
||||||
else:
|
|
||||||
sys.stderr.write("Whoops. Expected a list of reg file regs; got:\n"+l)
|
|
||||||
|
|
||||||
#############
|
|
||||||
# Main Code #
|
|
||||||
#############
|
|
||||||
for l in fileinput.input():
|
|
||||||
#sys.stderr.write(l)
|
|
||||||
if l.startswith('qemu-system-riscv64: QEMU: Terminated via GDBstub'):
|
|
||||||
break
|
|
||||||
elif l.startswith('IN:'):
|
|
||||||
# New disassembled instr
|
|
||||||
parseState = "instr"
|
|
||||||
elif (parseState == "instr") and l.startswith('0x'):
|
|
||||||
if "out of bounds" in l:
|
|
||||||
sys.stderr.write("Detected QEMU page fault error\n")
|
|
||||||
beginPageFault = not inPageFault
|
|
||||||
if beginPageFault:
|
|
||||||
returnAdr = int(l.split()[0][2:-1], 16)
|
|
||||||
sys.stderr.write('Saving SEPC of '+hex(returnAdr)+'\n')
|
|
||||||
inPageFault = 1
|
|
||||||
else:
|
|
||||||
endPageFault = inPageFault
|
|
||||||
inPageFault = 0
|
|
||||||
adr = int(l.split()[0][2:-1], 16)
|
|
||||||
instrs[adr] = l
|
|
||||||
parseState = "CSRs"
|
|
||||||
elif parseState == "CSRs":
|
|
||||||
parseCSRs(l)
|
|
||||||
elif parseState == "regFile":
|
|
||||||
parseRegs(l)
|
|
||||||
@ -1,99 +0,0 @@
|
|||||||
#! /usr/bin/python3
|
|
||||||
import sys, os
|
|
||||||
|
|
||||||
################
|
|
||||||
# Helper Funcs #
|
|
||||||
################
|
|
||||||
|
|
||||||
def tokenize(string):
|
|
||||||
tokens = []
|
|
||||||
token = ''
|
|
||||||
whitespace = 0
|
|
||||||
prevWhitespace = 0
|
|
||||||
for char in string:
|
|
||||||
prevWhitespace = whitespace
|
|
||||||
whitespace = char in ' \t\n'
|
|
||||||
if (whitespace):
|
|
||||||
if ((not prevWhitespace) and (token != '')):
|
|
||||||
tokens.append(token)
|
|
||||||
token = ''
|
|
||||||
else:
|
|
||||||
token = token + char
|
|
||||||
return tokens
|
|
||||||
|
|
||||||
#############
|
|
||||||
# Main Code #
|
|
||||||
#############
|
|
||||||
print("Begin parsing state.")
|
|
||||||
|
|
||||||
# Parse Args
|
|
||||||
if len(sys.argv) != 2:
|
|
||||||
sys.exit('Error parseState.py expects 1 arg:\n parseState.py <path_to_checkpoint_dir>')
|
|
||||||
outDir = sys.argv[1]+'/'
|
|
||||||
stateGDBpath = outDir+'intermediate-outputs/stateGDB.txt'
|
|
||||||
if not os.path.exists(stateGDBpath):
|
|
||||||
sys.exit('Error input file '+stateGDBpath+'not found')
|
|
||||||
|
|
||||||
singleCSRs = ['pc','mip','mie','mscratch','mcause','mepc','mtvec','medeleg','mideleg','sscratch','scause','sepc','stvec','sedeleg','sideleg','satp','mstatus','priv']
|
|
||||||
# priv (current privilege mode) isn't technically a CSR but we can log it with the same machinery
|
|
||||||
thirtyTwoBitCSRs = ['mcounteren','scounteren']
|
|
||||||
listCSRs = ['hpmcounter','pmpaddr']
|
|
||||||
pmpcfg = ['pmpcfg']
|
|
||||||
|
|
||||||
# Initialize List CSR files to empty
|
|
||||||
# (because later we'll open them in append mode)
|
|
||||||
for csr in listCSRs+pmpcfg:
|
|
||||||
outFileName = 'checkpoint-'+csr.upper()
|
|
||||||
outFile = open(outDir+outFileName, 'w')
|
|
||||||
outFile.close()
|
|
||||||
|
|
||||||
# Initial State for Main Loop
|
|
||||||
currState = 'regFile'
|
|
||||||
regFileIndex = 0
|
|
||||||
outFileName = 'checkpoint-RF'
|
|
||||||
outFile = open(outDir+outFileName, 'w')
|
|
||||||
|
|
||||||
# Main Loop
|
|
||||||
with open(stateGDBpath, 'r') as stateGDB:
|
|
||||||
for line in stateGDB:
|
|
||||||
line = tokenize(line)
|
|
||||||
name = line[0]
|
|
||||||
val = line[1][2:]
|
|
||||||
if (currState == 'regFile'):
|
|
||||||
if (regFileIndex == 0 and name != 'zero'):
|
|
||||||
print('Whoops! Expected regFile registers to come first, starting with zero')
|
|
||||||
exit(1)
|
|
||||||
if (name != 'zero'):
|
|
||||||
# Wally doesn't need to know zero=0
|
|
||||||
outFile.write(val+'\n')
|
|
||||||
regFileIndex += 1
|
|
||||||
if (regFileIndex == 32):
|
|
||||||
outFile.close()
|
|
||||||
currState = 'CSRs'
|
|
||||||
elif (currState == 'CSRs'):
|
|
||||||
if name in singleCSRs:
|
|
||||||
outFileName = 'checkpoint-'+name.upper()
|
|
||||||
outFile = open(outDir+outFileName, 'w')
|
|
||||||
outFile.write(val+'\n')
|
|
||||||
outFile.close()
|
|
||||||
elif name in thirtyTwoBitCSRs:
|
|
||||||
outFileName = 'checkpoint-'+name.upper()
|
|
||||||
outFile = open(outDir+outFileName, 'w')
|
|
||||||
val = int(val,16) & 0xffffffff
|
|
||||||
outFile.write(hex(val)[2:]+'\n')
|
|
||||||
outFile.close()
|
|
||||||
elif name.strip('0123456789') in listCSRs:
|
|
||||||
outFileName = 'checkpoint-'+name.upper().strip('0123456789')
|
|
||||||
outFile = open(outDir+outFileName, 'a')
|
|
||||||
outFile.write(val+'\n')
|
|
||||||
outFile.close()
|
|
||||||
elif name.strip('0123456789') in pmpcfg:
|
|
||||||
outFileName = 'checkpoint-'+name.upper().strip('0123456789')
|
|
||||||
outFile = open(outDir+outFileName, 'a')
|
|
||||||
fourPmp = int(val,16)
|
|
||||||
for i in range(0,4):
|
|
||||||
byte = (fourPmp >> 8*i) & 0xff
|
|
||||||
outFile.write(hex(byte)[2:]+'\n')
|
|
||||||
outFile.close()
|
|
||||||
|
|
||||||
print("Finished parsing state!")
|
|
||||||
@ -1,20 +0,0 @@
|
|||||||
#!/usr/bin/awk -f
|
|
||||||
|
|
||||||
BEGIN{
|
|
||||||
old = "first"
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
if($1 != old){
|
|
||||||
if(old != "first"){
|
|
||||||
print oldAll
|
|
||||||
}
|
|
||||||
}
|
|
||||||
old=$1
|
|
||||||
oldAll=$0
|
|
||||||
}
|
|
||||||
|
|
||||||
END{
|
|
||||||
print oldAll
|
|
||||||
}
|
|
||||||
|
|
||||||
Loading…
Reference in New Issue
Block a user