From 247879e7c707c9106c1fd06825f5a195074a8c42 Mon Sep 17 00:00:00 2001 From: eroom1966 Date: Wed, 18 Jan 2023 13:37:28 +0000 Subject: [PATCH] add im flags for compressed disass --- pipelined/regression/imperas.ic | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/pipelined/regression/imperas.ic b/pipelined/regression/imperas.ic index 8a925389f..164cec228 100644 --- a/pipelined/regression/imperas.ic +++ b/pipelined/regression/imperas.ic @@ -1,20 +1,26 @@ #--showoverrides +--override cpu/show_c_prefix=T --override cpu/unaligned=F ---override refRoot/cpu/mstatus_FS=1 +--override cpu/mstatus_FS=1 + # Enable the Imperas instruction coverage -extlib refRoot/cpu/cv=imperas.com/intercept/riscvInstructionCoverage/1.0 -override refRoot/cpu/cv/cover=basic -override refRoot/cpu/cv/extensions=RV32I + # Add Imperas simulator application instruction tracing --trace --tracechange --traceshowicount --tracemode --monitornetschange + # Turn on verbose output for Imperas simulator --verbose + # Turn on verbose output for RISCV model --override cpu/verbose=1 + # Store simulator output to logfile --output imperas.log