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added testbench.sv support for embench tests, test output still WIP

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DTowersM 2022-05-31 20:13:32 +00:00
parent abb6ba97cf
commit 2088c0cd7c
1 changed files with 2 additions and 1 deletions
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pipelined/testbench/testbench.sv
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@ -119,6 +119,7 @@ logic [3:0] dummy;
"wally32i": tests = wally32i; // *** redo "wally32i": tests = wally32i; // *** redo
"wally32e": tests = wally32e; "wally32e": tests = wally32e;
"wally32priv": tests = wally32priv; // *** redo "wally32priv": tests = wally32priv; // *** redo
"embench": tests = embench;
endcase endcase
end end
if (tests.size() == 0) begin if (tests.size() == 0) begin
@ -127,7 +128,7 @@ logic [3:0] dummy;
end end
end end
string signame, memfilename, pathname; string signame, memfilename, pathname, objdumpfilename, adrstr;
logic [31:0] GPIOPinsIn, GPIOPinsOut, GPIOPinsEn; logic [31:0] GPIOPinsIn, GPIOPinsOut, GPIOPinsEn;
logic UARTSin, UARTSout; logic UARTSin, UARTSout;