From 1f63e6d483a8d33e818a7c49591ec985bc74c878 Mon Sep 17 00:00:00 2001 From: "James E. Stine" Date: Thu, 22 Jun 2023 15:25:56 -0500 Subject: [PATCH] Remove path for cvw.sv so its found --- sim/testfloat.do | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sim/testfloat.do b/sim/testfloat.do index ffa03dc8d..85bd6dfc5 100644 --- a/sim/testfloat.do +++ b/sim/testfloat.do @@ -25,7 +25,7 @@ vlib work # start and run simulation # remove +acc flag for faster sim during regressions if there is no need to access internal signals # $num = the added words after the call -vlog +incdir+../config/$1 +incdir+../config/shared ../src/wally/cvw.sv ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/fpu/*/*.sv ../src/generic/*.sv ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697 +vlog +incdir+../config/$1 +incdir+../config/shared ../src/cvw.sv ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/fpu/*/*.sv ../src/generic/*.sv ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697 # Change TEST_SIZE to only test certain FP width # values are QP, DP, SP, HP