From 17aebb8a3b943377e6815ae6f490baff37f61957 Mon Sep 17 00:00:00 2001 From: Ross Thompson Date: Fri, 13 Jan 2023 18:05:47 -0600 Subject: [PATCH] Partial fix to RAS prediction accurracy. --- pipelined/src/ifu/RAsPredictor.sv | 16 +++++++++------- pipelined/src/ifu/bpred.sv | 8 +++++++- 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/pipelined/src/ifu/RAsPredictor.sv b/pipelined/src/ifu/RAsPredictor.sv index 3d82342fc..c71ff2966 100644 --- a/pipelined/src/ifu/RAsPredictor.sv +++ b/pipelined/src/ifu/RAsPredictor.sv @@ -32,12 +32,14 @@ module RASPredictor #(parameter int StackSize = 16 ) (input logic clk, - input logic reset, - input logic PopF, + input logic reset, + input logic PopF, output logic [`XLEN-1:0] RASPCF, - input logic PushE, - input logic incr, - input logic [`XLEN-1:0] PCLinkE + input logic [3:0] WrongPredInstrClassD, + input logic [3:0] InstrClassD, + input logic PushE, + input logic incr, + input logic [`XLEN-1:0] PCLinkE ); // *** need to update so it either doesn't push until the memory stage @@ -50,9 +52,9 @@ module RASPredictor logic [StackSize-1:0] [`XLEN-1:0] memory; integer index; - assign CounterEn = PopF | PushE | incr; + assign CounterEn = PopF | PushE | incr | WrongPredInstrClassD[2]; - assign PtrD = PopF ? PtrM1 : PtrP1; + assign PtrD = PopF | InstrClassD[2] ? PtrM1 : PtrP1; assign PtrM1 = PtrQ - 1'b1; assign PtrP1 = PtrQ + 1'b1; diff --git a/pipelined/src/ifu/bpred.sv b/pipelined/src/ifu/bpred.sv index 53bd4bafd..38efe8fd5 100644 --- a/pipelined/src/ifu/bpred.sv +++ b/pipelined/src/ifu/bpred.sv @@ -79,7 +79,8 @@ module bpred ( logic BPPredWrongM; logic [`XLEN-1:0] PCNext0F; logic [`XLEN-1:0] PCCorrectE; - + logic [3:0] WrongPredInstrClassD; + // Part 1 branch direction prediction // look into the 2 port Sram model. something is wrong. if (`BPTYPE == "BPTWOBIT") begin:Predictor @@ -157,6 +158,8 @@ module bpred ( RASPredictor RASPredictor(.clk(clk), .reset(reset), .PopF(PredInstrClassF[2] & ~StallF), + .WrongPredInstrClassD, + .InstrClassD, .RASPCF, .PushE(InstrClassE[3] & ~StallE), .incr(1'b0), @@ -213,6 +216,9 @@ module bpred ( assign RASPredPCWrongE = InstrClassE[2] & PredictionPCWrongE; // Finally if the real instruction class is non CFI but the predictor said it was we need to count. assign BPPredClassNonCFIWrongE = PredictionInstrClassWrongE & ~|InstrClassE; + + // branch class prediction wrong. + assign WrongPredInstrClassD = PredInstrClassD ^ InstrClassD; // Selects the BP or PC+2/4.