diff --git a/tests/coverage/WALLY-init-lib.h b/tests/coverage/WALLY-init-lib.h
index f98a42b74..1dd43accf 100644
--- a/tests/coverage/WALLY-init-lib.h
+++ b/tests/coverage/WALLY-init-lib.h
@@ -66,9 +66,8 @@ interrupt:              # must be a timer interrupt
     j trap_return       # clean up and return
 
 exception:
-    csrr t1, mepc   # add 4 to MEPC to determine return Address
-    addi t1, t1, 4
-    csrw mepc, t1
+    li t0, 2
+    csrr t1, mcause
     li t1, 8            # is it an ecall trap?
     andi t0, t0, 0xFC # if CAUSE = 8, 9, or 11
     bne t0, t1, trap_return # ignore other exceptions
@@ -87,6 +86,20 @@ changeprivilege:
     csrs mstatus, a0    # set mstatus.MPP with desired privilege
 
 trap_return:            # return from trap handler
+    csrr t0, mepc  # get address of instruction that caused exception
+    lh t0, 0(t0)   # get instruction that caused exception
+    li t1, 3
+    and t0, t0, t1  # mask off upper bits
+    beq t0, t1, instr32  # if lower 2 bits are 11, instruction is uncompresssed
+    li t0, 2        # increment PC by 2 for compressed instruction
+    j updateepc
+instr32:
+    li t0, 4
+updateepc:
+    csrr t1, mepc   # add 2 or 4 (from t0) to MEPC to determine return Address
+    add t1, t1, t0
+    csrw mepc, t1
+
     ld t1, -8(tp)       # restore t1 and t0
     ld t0, 0(tp)
     csrrw tp, mscratch, tp  # restore tp
diff --git a/tests/coverage/ieu.S b/tests/coverage/ieu.S
index 3fd56686f..cb0dae877 100644
--- a/tests/coverage/ieu.S
+++ b/tests/coverage/ieu.S
@@ -42,6 +42,7 @@ main:
     clz t1, t0
 
     # Test forwarding from store conditional
+    mv a0, sp
     lr.w t0, 0(a0)
     sc.w t0, a1, 0(a0)
     addi t0, t0, 1
diff --git a/tests/coverage/ifu.S b/tests/coverage/ifu.S
index abcd2078a..ef863c617 100644
--- a/tests/coverage/ifu.S
+++ b/tests/coverage/ifu.S
@@ -44,44 +44,6 @@ main:
     //.hword 0x9C01     //# Illegal compressed instruction with op = 01, instr[15:10] = 100111, and 0's everywhere else
 
 
-    // vm64check coverage
-    // check virtual addresses with bits 63:47 and/or 46:38 being equal or unequal
-    li t0, 0x0000000080000000
-    lw t1, 0(t0)
-    li t0, 0xFFFFFFFF80000000
-    lw t1, 0(t0)
-    li t1, 0xFFF8000080000000
-    lw t1, 0(t0)
-    li t1, 0x1000000080000000
-    lw t1, 0(t0)
-    li t1, 0x0000010080000000
-    lw t1, 0(t0)
-   li t0, 0x8000000000000000 
-   csrw satp, t0   # SV39 mode
-    li t0, 0x0000000080000000
-    lw t1, 0(t0)
-    li t0, 0xFFFFFFFF80000000
-    lw t1, 0(t0)
-    li t1, 0xFFF8000080000000
-    lw t1, 0(t0)
-    li t1, 0x1000000080000000
-    lw t1, 0(t0)
-    li t1, 0x0000010080000000
-    lw t1, 0(t0)
-   li t0, 0x9000000000000000 
-   csrw satp, t0   # SV48 mode
-    li t0, 0x0000000080000000
-    lw t1, 0(t0)
-    li t0, 0xFFFFFFFF80000000
-    lw t1, 0(t0)
-    li t1, 0xFFF8000080000000
-    lw t1, 0(t0)
-    li t1, 0x1000000080000000
-    lw t1, 0(t0)
-    li t1, 0x0000010080000000
-    lw t1, 0(t0)
-   li t0, 0x0000000000000000 
-   csrw satp, t0   # disable virtual memory
+    
    
-
     j done