From 16cde5f87e240f24443a568a4835e0a3c6010b39 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Mon, 29 Aug 2022 04:32:27 -0700
Subject: [PATCH] Simplify FSM

---
 pipelined/src/fpu/fdivsqrtfsm.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/pipelined/src/fpu/fdivsqrtfsm.sv b/pipelined/src/fpu/fdivsqrtfsm.sv
index c4780bcee..d506ad3b1 100644
--- a/pipelined/src/fpu/fdivsqrtfsm.sv
+++ b/pipelined/src/fpu/fdivsqrtfsm.sv
@@ -103,7 +103,7 @@ module fdivsqrtfsm(
           if (SpecialCase) state <= #1 DONE;
           else             state <= #1 BUSY;
       end else if (state == BUSY) begin
-          if ((~|step[`DURLEN-1:1]&step[0])|WZero) begin
+          if ((step == 1) | WZero) begin
               state <= #1 DONE;
           end
           step <= step - 1;