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Fixed bug and tried to reset menvcfg to improve testing of csri in priv.

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harshinisrinath 2023-07-30 16:40:06 -07:00
parent 24792d82e9
commit 15dbbef9ad
1 changed files with 26 additions and 4 deletions
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30
tests/coverage/priv.S
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@ -56,16 +56,38 @@ sretdone:
csrw satp, zero csrw satp, zero
# STIMECMP from S mode # STIMECMP from S mode
li t0, 1 # 1st is when MENVCFG_STCE is cleared
li a0, 3
ecall # starts in M-mode
csrw menvcfg, x0
li a0, 1
ecall # enter S-mode ecall # enter S-mode
csrw stimecmp, zero csrw stimecmp, zero
li t0, 3 li a0, 3
ecall # return to M-mode ecall # return to M-mode
csrsi mcounteren, 2 # mcounteren_tm = 1 csrsi mcounteren, 2 # mcounteren_tm = 1
li t0, 1 li a0, 1
ecall # supervisor mode again ecall # supervisor mode again
csrw stimecmp, zero csrw stimecmp, zero
li t0, 3 li a0, 3
ecall # machine mode again
# STIMECMP from S mode
# 2nd is when MENVCFG_STCE is set
csrci mcounteren, 2 # mcounteren_tm = 0
li t0, 1
slli t0, t0, 63
csrw menvcfg, t0
li a0, 1
ecall # enter S-mode
csrw stimecmp, zero
li a0, 3
ecall # return to M-mode
csrsi mcounteren, 2 # mcounteren_tm = 1
li a0, 1
ecall # supervisor mode again
csrw stimecmp, zero
li a0, 3
ecall # machine mode again ecall # machine mode again