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fixed CSR read-only test to have correct output

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Kip Macsai-Goren 2022-01-31 20:03:00 +00:00
parent 5ce8dd60c5
commit 14933a7231
1 changed files with 5 additions and 5 deletions
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10
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/NEW-LIB.h
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@ -470,18 +470,18 @@ begin_test: // label here to jump to so we dont go through the trap handler befo
.macro csr_r_access CSR .macro csr_r_access CSR
// verify that a csr is accessible to read but not to write // verify that a csr is accessible to read but not to write
// Success outputs: // Success outputs:
// 0x2, then
// 0x11 *** consider changing to something more meaningful // 0x11 *** consider changing to something more meaningful
// Fault outputs: // Fault outputs:
// 0x2, then
// 0xBAD *** consider changing this one as well. in general, do we need the branching if it hould cause an illegal instruction fault? // 0xBAD *** consider changing this one as well. in general, do we need the branching if it hould cause an illegal instruction fault?
csrr x29, \CSR csrr x29, \CSR
csrwi \CSR\(), 0xA // Attempt to write a 'random' value to the CSR csrwi \CSR\(), 0xA // Attempt to write a 'random' value to the CSR
csrr x30, \CSR csrr x30, \CSR
bne x30, x29, 1f // 1f represents r_access_success bne x30, x29, 1f // 1f represents write_access
li x30, 0xBAD // Write succeeded, violating read only permissions. li x30, 0x11 // Write succeeded, violating read only permissions.
j 2f // j r_access_end j 2f // j r_access_end
1: // r_access_success 1: // w_access (test failed)
li x30, 0x11 li x30, 0xBAD
2: // r_access end 2: // r_access end
sd x30, 0(x6) sd x30, 0(x6)
addi x6, x6, 8 addi x6, x6, 8