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Fixed formatting

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This commit is contained in:
Harshini Srinath 2023-07-30 17:38:22 -07:00 committed by GitHub
parent bbbd5f6b2d
commit 141384f60f
1 changed files with 13 additions and 15 deletions
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6
src/fpu/postproc/cvtshiftcalc.sv
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@ -47,7 +47,7 @@ module cvtshiftcalc import cvw::*; #(parameter cvw_t P) (
// seclect the input to the shifter
// fp -> int:
// | P.XLEN zeros | mantissa | 0's if nessisary |
// | P.XLEN zeros | mantissa | 0's if necessary |
// .
// Other problems:
// - if shifting to the right (neg CalcExp) then don't a 1 in the round bit (to prevent an incorrect plus 1 later durring rounding)
@ -58,7 +58,7 @@ module cvtshiftcalc import cvw::*; #(parameter cvw_t P) (
// | P.NF-1 zeros | mantissa | 0's if nessisary |
// .
// - otherwise:
// | LzcInM | 0's if nessisary |
// | LzcInM | 0's if necessary |
// .
// change to int shift to the left one
always_comb
@ -95,8 +95,6 @@ module cvtshiftcalc import cvw::*; #(parameter cvw_t P) (
endcase
end
// determine if the result underflows ??? -> fp
// - if the first 1 is shifted out of the result then the result underflows
// - can't underflow an integer to fp conversions