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	add prefix to site-setup for Issue #647
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				| @ -21,13 +21,13 @@ export VCS_HOME=/cad/synopsys/vcs/U-2023.03-SP2-4                   # Change thi | ||||
| export PATH=$QUESTA_HOME/bin:$DC_HOME/bin:$VCS_HOME/bin:$PATH | ||||
| 
 | ||||
| # Environmental variables for SoC | ||||
| export pdk=/proj/models/tsmc28/libraries/28nmtsmc/tcbn28hpcplusbwp30p140_190a/ | ||||
| export SYN_pdk=/proj/models/tsmc28/libraries/28nmtsmc/tcbn28hpcplusbwp30p140_190a/ | ||||
| #export osupdk=/import/yukari1/pdk/TSMC/28/CMOS/HPC+/stclib/9-track/tcbn28hpcplusbwp30p140-set/tcbn28hpcplusbwp30p140_190a_FE/ | ||||
| export TLU=/home/jstine/TLU+ | ||||
| export SYN_TLU=/home/jstine/TLU+ | ||||
| #export OSUTLU=/import/yukari1/pdk/TSMC/TLU+ | ||||
| export MW=/home/jstine/MW | ||||
| export SYN_MW=/home/jstine/MW | ||||
| #export OSUMW=/import/yukari1/pdk/TSMC/MW | ||||
| export memory=/home/jstine/WallyMem/rv64gc/ | ||||
| export SYN_memory=/home/jstine/WallyMem/rv64gc/ | ||||
| #export osumemory=/import/yukari1/pdk/TSMC/WallyMem/rv64gc/ | ||||
| 
 | ||||
| # GCC | ||||
|  | ||||
| @ -18,16 +18,16 @@ if {$tech == "sky130"} { | ||||
|     set s9lib $timing_lib/sky90/sky90_sc/V1.7.4/lib | ||||
|     lappend search_path $s9lib | ||||
| } elseif {$tech == "tsmc28"} { | ||||
|     set s10lib $pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp30p140_180a | ||||
|     set s10lib $SYN_pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp30p140_180a | ||||
|     lappend search_path $s10lib | ||||
| } elseif {$tech == "tsmc28psyn"} { | ||||
|     set s10lib $pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp30p140_180a | ||||
|     set s10lib $SYN_pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp30p140_180a | ||||
|     lappend search_path $s10lib | ||||
|     set TLUPLUS true | ||||
|     set mw_logic1_net VDD | ||||
|     set mw_logic0_net VSS | ||||
|     set CAPTABLE $TLU/1p8m/ | ||||
|     set MW_REFERENCE_LIBRARY $MW | ||||
|     set CAPTABLE $SYN_TLU/1p8m/ | ||||
|     set MW_REFERENCE_LIBRARY $SYN_MW | ||||
|     set MW_TECH_FILE tcbn28hpcplusbwp30p140 | ||||
|     set MIN_TLU_FILE $CAPTABLE/crn28hpc+_1p08m+ut-alrdl_5x1z1u_rcbest.tluplus | ||||
|     set MAX_TLU_FILE $CAPTABLE/crn28hpc+_1p08m+ut-alrdl_5x1z1u_rcworst.tluplus | ||||
| @ -62,10 +62,10 @@ lappend search_path ./scripts | ||||
| lappend search_path ./hdl | ||||
| lappend search_path ./mapped | ||||
| if {($tech == "tsmc28psyn")} { | ||||
|     lappend target_library $memory/ts1n28hpcpsvtb64x128m4sw_180a/NLDM/ts1n28hpcpsvtb64x128m4sw_tt0p9v25c.db | ||||
|     lappend target_library $memory/ts1n28hpcpsvtb64x44m4sw_180a/NLDM/ts1n28hpcpsvtb64x44m4sw_tt0p9v25c.db | ||||
|     lappend target_library $memory/tsdn28hpcpa1024x68m4mw_130a/NLDM/tsdn28hpcpa1024x68m4mw_tt0p9v25c.db | ||||
|     lappend target_library $memory/tsdn28hpcpa64x32m4mw_130a/NLDM/tsdn28hpcpa64x32m4mw_tt0p9v25c.db | ||||
|     lappend target_library $SYN_memory/ts1n28hpcpsvtb64x128m4sw_180a/NLDM/ts1n28hpcpsvtb64x128m4sw_tt0p9v25c.db | ||||
|     lappend target_library $SYN_memory/ts1n28hpcpsvtb64x44m4sw_180a/NLDM/ts1n28hpcpsvtb64x44m4sw_tt0p9v25c.db | ||||
|     lappend target_library $SYN_memory/tsdn28hpcpa1024x68m4mw_130a/NLDM/tsdn28hpcpa1024x68m4mw_tt0p9v25c.db | ||||
|     lappend target_library $SYN_memory/tsdn28hpcpa64x32m4mw_130a/NLDM/tsdn28hpcpa64x32m4mw_tt0p9v25c.db | ||||
|     lappend mw_reference_library $MW_REFERENCE_LIBRARY/ts1n28hpcpsvtb64x44m4sw | ||||
|     lappend mw_reference_library $MW_REFERENCE_LIBRARY/ts1n28hpcpsvtb64x128m4sw | ||||
|     lappend mw_reference_library $MW_REFERENCE_LIBRARY/tsdn28hpcpa1024x68m4mw | ||||
| @ -77,7 +77,7 @@ set link_library "$target_library $synthetic_library" | ||||
| 
 | ||||
| # Set up User Information | ||||
| set company "Detect-o-rama" | ||||
| set user    "Ben Bitbiddle" | ||||
| set user    "Ben Bitdiddle" | ||||
| 
 | ||||
| # Alias | ||||
| alias ra report_area | ||||
|  | ||||
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