From 12d1aed8a9360ab4d4a5c651c7cbacb57e716bf5 Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Mon, 30 Oct 2023 07:06:34 -0700
Subject: [PATCH] Fix issue 444 by preventing delegation of misaligned
 instructions when compressed instructions are supported.

---
 src/privileged/csrm.sv | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/privileged/csrm.sv b/src/privileged/csrm.sv
index 6e5a49c80..ad489c208 100644
--- a/src/privileged/csrm.sv
+++ b/src/privileged/csrm.sv
@@ -94,7 +94,8 @@ module csrm  import cvw::*;  #(parameter cvw_t P) (
   localparam DSCRATCH1     = 12'h7B3;
   // Constants
   localparam ZERO = {(P.XLEN){1'b0}};
-  localparam MEDELEG_MASK  = 16'hB3FF;
+  // when C is supported, there can't be misaligned instructions
+  localparam MEDELEG_MASK  = P.C_SUPPORTED ? 16'hB3FE : 16'hB3FF;
   localparam MIDELEG_MASK  = 12'h222; // we choose to not make machine interrupts delegable
 
  // There are PMP_ENTRIES = 0, 16, or 64 PMPADDR registers, each of which has its own flop