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Fix fpdivsqrt lint error on CPA for convergence

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This commit is contained in:
James E. Stine 2021-10-20 17:46:13 -05:00
parent 687703f0d8
commit 129ef03b2d
1 changed files with 1 additions and 1 deletions
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wally-pipelined/src/fpu/divconv.sv
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@ -88,7 +88,7 @@ module divconv (
mux2 #(60) mxA ({60'hFFFF_FFFF_FFFF_F9F}, {60'hFFFF_FF3F_FFFF_FFF}, P, qm_const);
// CPA (from CSA)/Remainder addition/subtraction
assign {cout1, mul_out} = (mcand*mplier) + constant + {118'b0, muxr_out};
assign {cout1, mul_out} = (mcand*mplier) + constant + {119'b0, muxr_out};
// Assuming [1,2) - q1
assign {cout2, q_out1} = regb_out + q_const;