From 113d71f1a0e9961c3022f7bd9c32bdb5bfbcf5b4 Mon Sep 17 00:00:00 2001 From: Rose Thompson Date: Thu, 15 Aug 2024 13:25:50 -0700 Subject: [PATCH] More name updates. --- fpga/comport.setup | 2 +- testbench/common/loggers.sv | 4 ++-- testbench/sdc/sdModel.sv | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/fpga/comport.setup b/fpga/comport.setup index cb4108b56..462d0be99 100644 --- a/fpga/comport.setup +++ b/fpga/comport.setup @@ -1,3 +1,3 @@ -sudo chown ross:ross /dev/ttyUSB1 +sudo chown rose:rose /dev/ttyUSB1 stty -F /dev/ttyUSB1 57600 cs8 -cstopb -parenb cat /dev/ttyUSB1 diff --git a/testbench/common/loggers.sv b/testbench/common/loggers.sv index 849bb6db1..a9edb7892 100644 --- a/testbench/common/loggers.sv +++ b/testbench/common/loggers.sv @@ -246,8 +246,8 @@ module loggers import cvw::*; #(parameter cvw_t P, flop #(1) ResetDReg(clk, reset, resetD); assign resetEdge = ~reset & resetD; initial begin - LogFile = "branch.log"; // will break some of Ross's research analysis scripts - CFILogFile = "cfi.log"; // will break some of Ross's research analysis scripts + LogFile = "branch.log"; // will break some of Rose's research analysis scripts + CFILogFile = "cfi.log"; // will break some of Rose's research analysis scripts //LogFile = $psprintf("branch_%s%0d.log", P.BPRED_TYPE, P.BPRED_SIZE); file = $fopen(LogFile, "w"); CFIfile = $fopen(CFILogFile, "w"); diff --git a/testbench/sdc/sdModel.sv b/testbench/sdc/sdModel.sv index 11f3ba5d7..34b88a18d 100644 --- a/testbench/sdc/sdModel.sv +++ b/testbench/sdc/sdModel.sv @@ -917,7 +917,7 @@ module sdModel WRITE_DATA: begin oeDat<=1; outdly_cnt<=outdly_cnt+1; - datOut <= 4'b1111; // listen... until I tell you otherwise, DAT bus is all high (thanks Ross) + datOut <= 4'b1111; // listen... until I tell you otherwise, DAT bus is all high (thanks Rose) if ( outdly_cnt > `DLY_TO_OUTP) begin // if (outdly_cnt > 47) NAC cycles elapsed