From 0ff59ff1574e8b2eff7802c9ebc3c820b7b421a0 Mon Sep 17 00:00:00 2001 From: Kevin Kim Date: Sun, 3 Mar 2024 13:00:20 -0800 Subject: [PATCH] remove redundant mux --- src/fpu/fdivsqrt/fdivsqrtiter.sv | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/fpu/fdivsqrt/fdivsqrtiter.sv b/src/fpu/fdivsqrt/fdivsqrtiter.sv index d3ee9a4f1..311565f56 100644 --- a/src/fpu/fdivsqrt/fdivsqrtiter.sv +++ b/src/fpu/fdivsqrt/fdivsqrtiter.sv @@ -80,12 +80,11 @@ module fdivsqrtiter import cvw::*; #(parameter cvw_t P) ( flopen #(P.DIVb+1) UMReg(clk, FDivBusyE, UMMux, UM[0]); // C register/initialization mux - // Initialize C to -1 for sqrt and -R for division logic [1:0] initCUpper; if(P.RADIX == 4) begin - mux2 #(2) cuppermux4(2'b00, 2'b00, SqrtE, initCUpper); // *** Remove this soon + assign initCUpper = 2'b00; end else begin - mux2 #(2) cuppermux2(2'b10, 2'b10, SqrtE, initCUpper); + assign initCUpper = 2'b10; end assign initC = {initCUpper, {P.DIVb{1'b0}}};