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Updated CoreMark benchmark to default to rv32 for better numbers

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This commit is contained in:
David Harris 2024-04-17 03:15:20 -07:00
parent 1d555cdbc3
commit 0ff478d2a1
1 changed files with 1 additions and 2 deletions
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benchmarks/coremark/Makefile
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@ -5,7 +5,7 @@
PORT_DIR = $(CURDIR)/riscv64-baremetal PORT_DIR = $(CURDIR)/riscv64-baremetal
cmbase= $(WALLY)/addins/coremark cmbase= $(WALLY)/addins/coremark
work_dir= $(WALLY)/benchmarks/coremark/work work_dir= $(WALLY)/benchmarks/coremark/work
XLEN ?=64 XLEN ?=32
sources=$(cmbase)/core_main.c $(cmbase)/core_list_join.c $(cmbase)/coremark.h \ sources=$(cmbase)/core_main.c $(cmbase)/core_list_join.c $(cmbase)/coremark.h \
$(cmbase)/core_matrix.c $(cmbase)/core_state.c $(cmbase)/core_util.c \ $(cmbase)/core_matrix.c $(cmbase)/core_state.c $(cmbase)/core_util.c \
$(PORT_DIR)/core_portme.h $(PORT_DIR)/core_portme.c $(PORT_DIR)/core_portme.mak \ $(PORT_DIR)/core_portme.h $(PORT_DIR)/core_portme.c $(PORT_DIR)/core_portme.mak \
@ -29,7 +29,6 @@ all: $(work_dir)/coremark.bare.riscv.elf.memfile
run: run:
time wsim rv$(XLEN)gc coremark 2>&1 | tee $(work_dir)/coremark.sim.log time wsim rv$(XLEN)gc coremark 2>&1 | tee $(work_dir)/coremark.sim.log
#(cd ../../sim && (time vsim -c -do "do wally-batch.do rv$(XLEN)gc coremark" 2>&1 | tee $(work_dir)/coremark.sim.log))
$(work_dir)/coremark.bare.riscv.elf.memfile: $(work_dir)/coremark.bare.riscv $(work_dir)/coremark.bare.riscv.elf.memfile: $(work_dir)/coremark.bare.riscv
riscv64-unknown-elf-objdump -D $< > $<.elf.objdump riscv64-unknown-elf-objdump -D $< > $<.elf.objdump