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Cleanup.

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Verilator still has issues with riscassertions.sv and the testbench
This commit is contained in:
Rose Thompson 2023-12-18 16:38:56 -06:00
parent b7b245fe2f
commit 0f7b6ada04
1 changed files with 6 additions and 6 deletions
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12
testbench/common/functionName.sv
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@ -30,8 +30,8 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
input string ProgramLabelMapFile input string ProgramLabelMapFile
); );
logic [P.XLEN-1:0] ProgramAddrMapMemory [longint]; logic [P.XLEN-1:0] ProgramAddrMapMemory [logic [P.XLEN-1:0]];
string ProgramLabelMapMemory [longint]; string ProgramLabelMapMemory [logic [P.XLEN-1:0]];
string FunctionName; string FunctionName;
@ -62,7 +62,7 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
task automatic bin_search_min; task automatic bin_search_min;
input logic [P.XLEN-1:0] pc; input logic [P.XLEN-1:0] pc;
input logic [P.XLEN-1:0] length; input logic [P.XLEN-1:0] length;
ref logic [P.XLEN-1:0] array [longint]; ref logic [P.XLEN-1:0] array [logic [P.XLEN-1:0]];
output logic [P.XLEN-1:0] minval; output logic [P.XLEN-1:0] minval;
output logic [P.XLEN-1:0] mid; output logic [P.XLEN-1:0] mid;
@ -109,9 +109,9 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
endtask // bin_search_min endtask // bin_search_min
integer ProgramAddrMapFP, ProgramLabelMapFP; integer ProgramAddrMapFP, ProgramLabelMapFP;
longint ProgramAddrMapLineCount; logic [P.XLEN-1:0] ProgramAddrMapLineCount;
longint ProgramLabelMapLineCount; logic [P.XLEN-1:0] ProgramLabelMapLineCount;
longint ProgramAddrMapLine; logic [P.XLEN-1:0] ProgramAddrMapLine;
string ProgramLabelMapLine; string ProgramLabelMapLine;
integer status; integer status;