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https://github.com/openhwgroup/cvw
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Removed unused PredInstrClassE register from bpred
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parent
0f4226a950
commit
0eda753dc4
@ -72,7 +72,7 @@ module bpred (
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logic PredValidF;
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logic PredValidF;
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logic [1:0] DirPredictionF;
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logic [1:0] DirPredictionF;
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logic [3:0] BTBPredInstrClassF, PredInstrClassF, PredInstrClassD, PredInstrClassE;
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logic [3:0] BTBPredInstrClassF, PredInstrClassF, PredInstrClassD;
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logic [`XLEN-1:0] PredPCF, RASPCF;
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logic [`XLEN-1:0] PredPCF, RASPCF;
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logic PredictionPCWrongE;
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logic PredictionPCWrongE;
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logic AnyWrongPredInstrClassD, AnyWrongPredInstrClassE;
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logic AnyWrongPredInstrClassD, AnyWrongPredInstrClassE;
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@ -207,8 +207,7 @@ module bpred (
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// pipeline the class
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// pipeline the class
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flopenrc #(4) PredInstrClassRegD(clk, reset, FlushD, ~StallD, PredInstrClassF, PredInstrClassD);
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flopenrc #(4) PredInstrClassRegD(clk, reset, FlushD, ~StallD, PredInstrClassF, PredInstrClassD);
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flopenrc #(1) WrongInstrClassRegE(clk, reset, FlushE, ~StallE, AnyWrongPredInstrClassD, AnyWrongPredInstrClassE);
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flopenrc #(1) WrongInstrClassRegE(clk, reset, FlushE, ~StallE, AnyWrongPredInstrClassD, AnyWrongPredInstrClassE);
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flopenrc #(4) PredInstrClassRegE(clk, reset, FlushE, ~StallE, PredInstrClassD, PredInstrClassE);
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// Check the prediction
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// Check the prediction
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// if it is a CFI then check if the next instruction address (PCD) matches the branch's target or fallthrough address.
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// if it is a CFI then check if the next instruction address (PCD) matches the branch's target or fallthrough address.
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// if the class prediction is wrong a regular instruction may have been predicted as a taken branch
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// if the class prediction is wrong a regular instruction may have been predicted as a taken branch
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