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update Boolean logic for all testing for divide

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This commit is contained in:
James E. Stine 2024-01-29 17:37:35 -06:00
parent 95a97faf3f
commit 0d9e2fdf60
1 changed files with 5 additions and 5 deletions
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10
testbench/testbench-fp.sv
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@ -848,7 +848,7 @@ module testbenchfp;
end
S2: begin
DivStart = 1'b0;
if ((FDivBusyE)|(~DivDone))
if ((FDivBusyE|~DivDone)&(UnitVal == `DIVUNIT))
nextstate = S2;
else
nextstate = Done;
@ -960,16 +960,16 @@ module testbenchfp;
assign FMAop = (OpCtrlVal == `FMAUNIT);
assign DivDone = OldFDivBusyE & ~FDivBusyE;
assign CheckNow = ((DivDone | ~divsqrtop) |
(TEST == "all" | TEST == "add" | TEST == "fma" | TEST == "sub"))
& (UnitVal !== `CVTINTUNIT) & (UnitVal !== `CMPUNIT);
(TEST == "add" | TEST == "fma" | TEST == "sub") |
((TEST == "all") & (DivDone | ~divsqrtop)));
if (~(ResMatch & FlagMatch) & CheckNow & (Ans[0] !== 1'bx)) begin
errors += 1;
$display("\nError in %s", Tests[TestNum]);
$display("TestNum %d OpCtrl %d", TestNum, OpCtrl[TestNum]);
$display("inputs: %h %h %h\nSrcA: %h\n Res: %h %h\n Expected: %h %h", X, Y, Z, SrcA, Res, ResFlg, Ans, AnsFlg);
$stop;
end
end
if (TestVectors[VectorNum][0] === 1'bx & Tests[TestNum] !== "") begin // if reached the eof
// increment the test