mirror of
https://github.com/openhwgroup/cvw
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Merge pull request #933 from JacobPease/main
Committing the custom test spitest.
This commit is contained in:
Rose Thompson
GitHub
commit
0ce289c937
@ -1,3 +1,32 @@
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///////////////////////////////////////////////////////////////////////
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// spi.h
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//
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// Written: Jaocb Pease jacob.pease@okstate.edu 7/22/2024
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//
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// Purpose: Header file for interfaceing with the SPI peripheral
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//
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//
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the
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// “License”); you may not use this file except in compliance with the
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|
// License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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|
//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work
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// distributed under the License is distributed on an “AS IS” BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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// implied. See the License for the specific language governing
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// permissions and limitations under the License.
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///////////////////////////////////////////////////////////////////////
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#pragma once
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#pragma once
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#ifndef SPI_HEADER
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#ifndef SPI_HEADER
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#define SPI_HEADER
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#define SPI_HEADER
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112
tests/custom/spitest/Makefile
Normal file
112
tests/custom/spitest/Makefile
Normal file
@ -0,0 +1,112 @@
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CEXT := c
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CPPEXT := cpp
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AEXT := s
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SEXT := S
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SRCEXT := \([$(CEXT)$(AEXT)$(SEXT)]\|$(CPPEXT)\)
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OBJEXT := o
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DEPEXT := d
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SRCDIR := .
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BUILDDIR := OBJ
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SOURCES ?= $(shell find $(SRCDIR) -type f -regex ".*\.$(SRCEXT)" | sort)
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OBJECTS := $(SOURCES:.$(CEXT)=.$(OBJEXT))
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OBJECTS := $(OBJECTS:.$(AEXT)=.$(OBJEXT))
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OBJECTS := $(OBJECTS:.$(SEXT)=.$(OBJEXT))
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OBJECTS := $(OBJECTS:.$(CPPEXT)=.$(OBJEXT))
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OBJECTS := $(patsubst $(SRCDIR)/%,$(BUILDDIR)/%,$(OBJECTS))
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TARGETDIR := bin
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TARGET := $(TARGETDIR)/spitest.elf
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ROOT := ..
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LIBRARY_DIRS :=
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LIBRARY_FILES :=
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MARCH :=-march=rv64imfdc
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MABI :=-mabi=lp64d
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LINK_FLAGS :=$(MARCH) $(MABI) -nostartfiles
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LINKER :=$(ROOT)/linker8000-0000.x
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AFLAGS =$(MARCH) $(MABI) -W
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CFLAGS =$(MARCH) $(MABI) -mcmodel=medany -O2
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AS=riscv64-unknown-elf-as
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CC=riscv64-unknown-elf-gcc
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AR=riscv64-unknown-elf-ar
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#Default Make
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all: directories $(TARGET).memfile
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#Remake
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remake: clean all
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#Make the Directories
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directories:
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@mkdir -p $(TARGETDIR)
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@mkdir -p $(BUILDDIR)
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clean:
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rm -rf $(BUILDDIR) $(TARGETDIR) *.memfile *.objdump
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#Needed for building additional library projects
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ifdef LIBRARY_DIRS
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LIBS+=${LIBRARY_DIRS:%=-L%} ${LIBRARY_FILES:%=-l%}
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INC+=${LIBRARY_DIRS:%=-I%}
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${LIBRARY_DIRS}:
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make -C $@ -j 1
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.PHONY: $(LIBRARY_DIRS) $(TARGET)
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endif
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#Pull in dependency info for *existing* .o files
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-include $(OBJECTS:.$(OBJEXT)=.$(DEPEXT))
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#Link
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$(TARGET): $(OBJECTS) $(LIBRARY_DIRS)
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$(CC) $(LINK_FLAGS) -g -o $(TARGET) $(OBJECTS) ${LIBS} -T ${LINKER}
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#Compile
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$(BUILDDIR)/%.$(OBJEXT): $(SRCDIR)/%.$(CEXT)
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@mkdir -p $(dir $@)
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$(CC) $(CFLAGS) $(INC) -c -o $@ $< > $(BUILDDIR)/$*.list
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@$(CC) $(CFLAGS) $(INC) -MM $(SRCDIR)/$*.$(CEXT) > $(BUILDDIR)/$*.$(DEPEXT)
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@cp -f $(BUILDDIR)/$*.$(DEPEXT) $(BUILDDIR)/$*.$(DEPEXT).tmp
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@sed -e 's|.*:|$(BUILDDIR)/$*.$(OBJEXT):|' < $(BUILDDIR)/$*.$(DEPEXT).tmp > $(BUILDDIR)/$*.$(DEPEXT)
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@sed -e 's/.*://' -e 's/\\$$//' < $(BUILDDIR)/$*.$(DEPEXT).tmp | fmt -1 | sed -e 's/^ *//' -e 's/$$/:/' >> $(BUILDDIR)/$*.$(DEPEXT)
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@rm -f $(BUILDDIR)/$*.$(DEPEXT).tmp
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# gcc won't output dependencies for assembly files for some reason
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# most asm files don't have dependencies so the echo will work for now.
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$(BUILDDIR)/%.$(OBJEXT): $(SRCDIR)/%.$(AEXT)
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@mkdir -p $(dir $@)
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$(CC) $(CFLAGS) -c -o $@ $< > $(BUILDDIR)/$*.list
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@echo $@: $< > $(BUILDDIR)/$*.$(DEPEXT)
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$(BUILDDIR)/%.$(OBJEXT): $(SRCDIR)/%.$(SEXT)
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@mkdir -p $(dir $@)
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$(CC) $(CFLAGS) $(INC) -c -o $@ $< > $(BUILDDIR)/$*.list
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@echo $@: $< > $(BUILDDIR)/$*.$(DEPEXT)
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# C++
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$(BUILDDIR)/%.$(OBJEXT): $(SRCDIR)/%.$(CPPEXT)
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@mkdir -p $(dir $@)
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$(CC) $(CFLAGS) $(INC) -c -o $@ $< > $(BUILDDIR)/$*.list
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@$(CC) $(CFLAGS) $(INC) -MM $(SRCDIR)/$*.$(CPPEXT) > $(BUILDDIR)/$*.$(DEPEXT)
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@cp -f $(BUILDDIR)/$*.$(DEPEXT) $(BUILDDIR)/$*.$(DEPEXT).tmp
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@sed -e 's|.*:|$(BUILDDIR)/$*.$(OBJEXT):|' < $(BUILDDIR)/$*.$(DEPEXT).tmp > $(BUILDDIR)/$*.$(DEPEXT)
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@sed -e 's/.*://' -e 's/\\$$//' < $(BUILDDIR)/$*.$(DEPEXT).tmp | fmt -1 | sed -e 's/^ *//' -e 's/$$/:/' >> $(BUILDDIR)/$*.$(DEPEXT)
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@rm -f $(BUILDDIR)/$*.$(DEPEXT).tmp
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# convert to hex
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$(TARGET).memfile: $(TARGET)
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@echo 'Making object dump file.'
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@riscv64-unknown-elf-objdump -D $< > $<.objdump
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@echo 'Making memory file'
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riscv64-unknown-elf-elf2hex --bit-width 64 --input $^ --output $@
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extractFunctionRadix.sh $<.objdump
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mkdir -p ../work/
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cp -f $(TARGETDIR)/* ../work/
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116
tests/custom/spitest/spi.h
Normal file
116
tests/custom/spitest/spi.h
Normal file
@ -0,0 +1,116 @@
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///////////////////////////////////////////////////////////////////////
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// spi.h
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//
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// Written: Jaocb Pease jacob.pease@okstate.edu 7/22/2024
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//
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// Purpose: Header file for interfaceing with the SPI peripheral
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//
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//
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the
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||||||
|
// “License”); you may not use this file except in compliance with the
|
||||||
|
// License, or, at your option, the Apache License version 2.0. You
|
||||||
|
// may obtain a copy of the License at
|
||||||
|
//
|
||||||
|
// https://solderpad.org/licenses/SHL-2.1/
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||||||
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//
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||||||
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// Unless required by applicable law or agreed to in writing, any work
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||||||
|
// distributed under the License is distributed on an “AS IS” BASIS,
|
||||||
|
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
|
||||||
|
// implied. See the License for the specific language governing
|
||||||
|
// permissions and limitations under the License.
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||||||
|
///////////////////////////////////////////////////////////////////////
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#pragma once
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#ifndef SPI_HEADER
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#define SPI_HEADER
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#include <stdint.h>
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#define SPI_BASE 0x13000 /* Base address of SPI device used for SDC */
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/* register offsets */
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#define SPI_SCKDIV SPI_BASE + 0x00 /* Serial clock divisor */
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#define SPI_SCKMODE SPI_BASE + 0x04 /* Serial clock mode */
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#define SPI_CSID SPI_BASE + 0x10 /* Chip select ID */
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#define SPI_CSDEF SPI_BASE + 0x14 /* Chip select default */
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#define SPI_CSMODE SPI_BASE + 0x18 /* Chip select mode */
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#define SPI_DELAY0 SPI_BASE + 0x28 /* Delay control 0 */
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#define SPI_DELAY1 SPI_BASE + 0x2c /* Delay control 1 */
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#define SPI_FMT SPI_BASE + 0x40 /* Frame format */
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#define SPI_TXDATA SPI_BASE + 0x48 /* Tx FIFO data */
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#define SPI_RXDATA SPI_BASE + 0x4c /* Rx FIFO data */
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#define SPI_TXMARK SPI_BASE + 0x50 /* Tx FIFO [<35;39;29Mwatermark */
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#define SPI_RXMARK SPI_BASE + 0x54 /* Rx FIFO watermark */
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/* Non-implemented
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#define SPI_FCTRL SPI_BASE + 0x60 // SPI flash interface control
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#define SPI_FFMT SPI_BASE + 0x64 // SPI flash instruction format
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*/
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#define SPI_IE SPI_BASE + 0x70 /* Interrupt Enable Register */
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#define SPI_IP SPI_BASE + 0x74 /* Interrupt Pendings Register */
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/* delay0 bits */
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#define SIFIVE_SPI_DELAY0_CSSCK(x) ((uint32_t)(x))
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#define SIFIVE_SPI_DELAY0_CSSCK_MASK 0xffU
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#define SIFIVE_SPI_DELAY0_SCKCS(x) ((uint32_t)(x) << 16)
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#define SIFIVE_SPI_DELAY0_SCKCS_MASK (0xffU << 16)
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/* delay1 bits */
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#define SIFIVE_SPI_DELAY1_INTERCS(x) ((uint32_t)(x))
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#define SIFIVE_SPI_DELAY1_INTERCS_MASK 0xffU
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#define SIFIVE_SPI_DELAY1_INTERXFR(x) ((uint32_t)(x) << 16)
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#define SIFIVE_SPI_DELAY1_INTERXFR_MASK (0xffU << 16)
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/* csmode bits */
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#define SIFIVE_SPI_CSMODE_MODE_AUTO 0U
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#define SIFIVE_SPI_CSMODE_MODE_HOLD 2U
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#define SIFIVE_SPI_CSMODE_MODE_OFF 3U
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|
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// inline void write_reg(uintptr_t addr, uint32_t value);
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//inline uint32_t read_reg(uintptr_t addr);
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//inline void spi_sendbyte(uint8_t byte);
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//inline void waittx();
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//inline void waitrx();
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uint8_t spi_txrx(uint8_t byte);
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uint8_t spi_dummy();
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//inline uint8_t spi_readbyte();
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//uint64_t spi_read64();
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|
void spi_init();
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void spi_set_clock(uint32_t clkin, uint32_t clkout);
|
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|
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static inline void write_reg(uintptr_t addr, uint32_t value) {
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volatile uint32_t * loc = (volatile uint32_t *) addr;
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|
*loc = value;
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|
}
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|
|
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|
// Read a register
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|
static inline uint32_t read_reg(uintptr_t addr) {
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return *(volatile uint32_t *) addr;
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|
}
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|
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||||||
|
// Queues a single byte in the transfer fifo
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|
static inline void spi_sendbyte(uint8_t byte) {
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|
// Write byte to transfer fifo
|
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write_reg(SPI_TXDATA, byte);
|
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|
}
|
||||||
|
|
||||||
|
static inline void waittx() {
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|
while(!(read_reg(SPI_IP) & 1)) {}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void waitrx() {
|
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|
while(read_reg(SPI_IP) & 2) {}
|
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|
}
|
||||||
|
|
||||||
|
static inline uint8_t spi_readbyte() {
|
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|
return read_reg(SPI_RXDATA);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
107
tests/custom/spitest/spitest.c
Normal file
107
tests/custom/spitest/spitest.c
Normal file
@ -0,0 +1,107 @@
|
|||||||
|
///////////////////////////////////////////////////////////////////////
|
||||||
|
// spi.c
|
||||||
|
//
|
||||||
|
// Written: Jaocb Pease jacob.pease@okstate.edu 8/27/2024
|
||||||
|
//
|
||||||
|
// Purpose: C code to test SPI bugs
|
||||||
|
//
|
||||||
|
//
|
||||||
|
//
|
||||||
|
// A component of the Wally configurable RISC-V project.
|
||||||
|
//
|
||||||
|
// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
|
||||||
|
//
|
||||||
|
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||||
|
//
|
||||||
|
// Licensed under the Solderpad Hardware License v 2.1 (the
|
||||||
|
// “License”); you may not use this file except in compliance with the
|
||||||
|
// License, or, at your option, the Apache License version 2.0. You
|
||||||
|
// may obtain a copy of the License at
|
||||||
|
//
|
||||||
|
// https://solderpad.org/licenses/SHL-2.1/
|
||||||
|
//
|
||||||
|
// Unless required by applicable law or agreed to in writing, any work
|
||||||
|
// distributed under the License is distributed on an “AS IS” BASIS,
|
||||||
|
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
|
||||||
|
// implied. See the License for the specific language governing
|
||||||
|
// permissions and limitations under the License.
|
||||||
|
///////////////////////////////////////////////////////////////////////
|
||||||
|
|
||||||
|
#include "spi.h"
|
||||||
|
|
||||||
|
// Testing SPI peripheral in loopback mode
|
||||||
|
// TODO: Need to make sure the configuration I'm using uses loopback
|
||||||
|
// mode. This can be specified in derivlists.txt
|
||||||
|
// TODO:
|
||||||
|
|
||||||
|
uint8_t spi_txrx(uint8_t byte) {
|
||||||
|
spi_sendbyte(byte);
|
||||||
|
waittx();
|
||||||
|
return spi_readbyte();
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t spi_dummy() {
|
||||||
|
return spi_txrx(0xff);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi_set_clock(uint32_t clkin, uint32_t clkout) {
|
||||||
|
uint32_t div = (clkin/(2*clkout)) - 1;
|
||||||
|
write_reg(SPI_SCKDIV, div);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Initialize Sifive FU540 based SPI Controller
|
||||||
|
void spi_init(uint32_t clkin) {
|
||||||
|
// Enable interrupts
|
||||||
|
write_reg(SPI_IE, 0x3);
|
||||||
|
|
||||||
|
// Set TXMARK to 1. If the number of entries is < 1
|
||||||
|
// IP's txwm field will go high.
|
||||||
|
// Set RXMARK to 0. If the number of entries is > 0
|
||||||
|
// IP's rwxm field will go high.
|
||||||
|
write_reg(SPI_TXMARK, 1);
|
||||||
|
write_reg(SPI_RXMARK, 0);
|
||||||
|
|
||||||
|
// Set Delay 0 to default
|
||||||
|
write_reg(SPI_DELAY0,
|
||||||
|
SIFIVE_SPI_DELAY0_CSSCK(1) |
|
||||||
|
SIFIVE_SPI_DELAY0_SCKCS(1));
|
||||||
|
|
||||||
|
// Set Delay 1 to default
|
||||||
|
write_reg(SPI_DELAY1,
|
||||||
|
SIFIVE_SPI_DELAY1_INTERCS(1) |
|
||||||
|
SIFIVE_SPI_DELAY1_INTERXFR(0));
|
||||||
|
|
||||||
|
// Initialize the SPI controller clock to
|
||||||
|
// div = (20MHz/(2*400kHz)) - 1 = 24 = 0x18
|
||||||
|
write_reg(SPI_SCKDIV, 0x18);
|
||||||
|
}
|
||||||
|
|
||||||
|
void main() {
|
||||||
|
spi_init(100000000);
|
||||||
|
|
||||||
|
spi_set_clock(100000000,50000000);
|
||||||
|
|
||||||
|
volatile uint8_t *p = (uint8_t *)(0x8F000000);
|
||||||
|
int j;
|
||||||
|
uint64_t n = 0;
|
||||||
|
|
||||||
|
write_reg(SPI_CSMODE, SIFIVE_SPI_CSMODE_MODE_HOLD);
|
||||||
|
//n = 512/8;
|
||||||
|
|
||||||
|
n = 4;
|
||||||
|
do {
|
||||||
|
// Send 8 dummy bytes (fifo should be empty)
|
||||||
|
for (j = 0; j < 8; j++) {
|
||||||
|
spi_sendbyte(0xaa);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Reset counter. Process bytes AS THEY COME IN.
|
||||||
|
for (j = 0; j < 8; j++) {
|
||||||
|
while (!(read_reg(SPI_IP) & 2)) {}
|
||||||
|
uint8_t x = spi_readbyte();
|
||||||
|
*p++ = x;
|
||||||
|
}
|
||||||
|
} while(--n > 0);
|
||||||
|
|
||||||
|
write_reg(SPI_CSMODE, SIFIVE_SPI_CSMODE_MODE_AUTO);
|
||||||
|
}
|
||||||
Loading…
Reference in New Issue
Block a user