Made abhlite instation on wallypipehart more clear, updated spacing for consistency

This commit is contained in:
Noah Limpert 2021-11-24 22:48:01 -08:00
parent 8a64510ee4
commit 0cd31bfc1f

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@ -276,22 +276,20 @@ module wallypipelinedhart (
ahblite ebu(// IFU connections ahblite ebu(// IFU connections
.InstrPAdrF(InstrPAdrF), .clk, .reset,
.InstrReadF(InstrReadF), .UnsignedLoadM(1'b0), .AtomicMaskedM(2'b00),
.InstrRData(InstrRData), .InstrPAdrF, // *** rename these to match block diagram
.InstrAckF(InstrAckF), .InstrReadF, .InstrRData, .InstrAckF,
// LSU connections // Signals from Data Cache
.DCtoAHBPAdrM(DCtoAHBPAdrM), // rename to DCtoAHBPAdrM .DCtoAHBPAdrM, .DCtoAHBReadM, .DCtoAHBWriteM, .DCtoAHBWriteData,
.DCtoAHBReadM(DCtoAHBReadM), // rename to DCtoAHBReadM .DCfromAHBReadData,
.DCtoAHBWriteM(DCtoAHBWriteM), // rename to DCtoAHBWriteM .MemSizeM(DCtoAHBSizeM[1:0]), // *** remove
.DCtoAHBWriteData(DCtoAHBWriteData), .DCfromAHBAck,
.DCfromAHBReadData(DCfromAHBReadData),
.DCfromAHBAck(DCfromAHBAck), .HRDATA, .HREADY, .HRESP, .HCLK, .HRESETn,
// remove these .HADDR, .HWDATA, .HWRITE, .HSIZE, .HBURST,
.MemSizeM(DCtoAHBSizeM[1:0]), // *** depends on XLEN should be removed .HPROT, .HTRANS, .HMASTLOCK, .HADDRD, .HSIZED,
.UnsignedLoadM(1'b0), .HWRITED);
.AtomicMaskedM(2'b00),
.*);
muldiv mdu( muldiv mdu(
@ -319,7 +317,8 @@ module wallypipelinedhart (
.InvalidateICacheM, .InvalidateICacheM,
// Stall & flush outputs // Stall & flush outputs
.StallF, .StallD, .StallE, .StallM, .StallW, .StallF, .StallD, .StallE, .StallM, .StallW,
.FlushF, .FlushD, .FlushE, .FlushM, .FlushW); // global stall and flush control .FlushF, .FlushD, .FlushE, .FlushM, .FlushW
); // global stall and flush control
// Priveleged block operates in M and W stages, handling CSRs and exceptions // Priveleged block operates in M and W stages, handling CSRs and exceptions
privileged priv(.*); privileged priv(.*);