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Merge branch 'main' of https://github.com/stineje/cvw

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This commit is contained in:
Matthew 2024-06-03 22:25:58 -05:00
commit 0a6e7080dc
3 changed files with 56 additions and 53 deletions
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1
src/privileged/csr.sv
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@ -242,6 +242,7 @@ module csr import cvw::*; #(parameter cvw_t P) (
.MIP_REGW, .MIE_REGW, .WriteMSTATUSM, .WriteMSTATUSHM,
.IllegalCSRMAccessM, .IllegalCSRMWriteReadonlyM,
.MENVCFG_REGW, .DebugCapture, .DebugScanEn, .DebugScanIn, .DebugScanOut);
.MENVCFG_REGW, .DebugCapture, .DebugScanEn, .DebugScanIn, .DebugScanOut);
if (P.S_SUPPORTED) begin:csrs

2
src/privileged/privileged.sv
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@ -154,6 +154,8 @@ module privileged import cvw::*; #(parameter cvw_t P) (
.EPCM, .TrapVectorM,
.CSRReadValW, .IllegalCSRAccessM, .BigEndianM,
.DebugCapture, .DebugScanEn, .DebugScanIn, .DebugScanOut);
.CSRReadValW, .IllegalCSRAccessM, .BigEndianM,
.DebugCapture, .DebugScanEn, .DebugScanIn, .DebugScanOut);
// pipeline early-arriving trap sources
privpiperegs ppr(.clk, .reset, .StallD, .StallE, .StallM, .FlushD, .FlushE, .FlushM,