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mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
This commit is contained in:
David Harris 2021-01-27 06:40:39 -05:00
commit 092edf953e
2 changed files with 6 additions and 2 deletions
wally-pipelined

View File

@ -40,6 +40,7 @@ view wave
add wave /testbench_busybear/clk
add wave /testbench_busybear/reset
add wave -divider
add wave -hex /testbench_busybear/PCtext
add wave -hex /testbench_busybear/pcExpected
add wave -hex /testbench_busybear/dut/dp/PCF
add wave -hex /testbench_busybear/dut/dp/InstrF
@ -129,6 +130,6 @@ add wave /testbench_busybear/InstrWName
#set DefaultRadix hexadecimal
#
#-- Run the Simulation
run 800
run 900
#run -all
##quit

View File

@ -125,7 +125,8 @@ module testbench_busybear();
speculative = 0;
end
logic [63:0] lastInstrF, lastPC, lastPC2;
string PCtext, PCtext2;
integer instrs;
initial begin
instrs = 0;
@ -140,6 +141,8 @@ module testbench_busybear();
else begin
//if (~speculative) begin
// first read instruction
scan_file_PC = $fscanf(data_file_PC, "%s %s\n", PCtext, PCtext2);
PCtext = {PCtext, " ", PCtext2};
scan_file_PC = $fscanf(data_file_PC, "%x\n", InstrF);
// then expected PC value
scan_file_PC = $fscanf(data_file_PC, "%x\n", pcExpected);