Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Update root Makefile

Browse Source
This commit is contained in:
Jordan Carlin 2024-08-13 23:25:17 -07:00
parent 05b776219b
commit 09122f91c8
No known key found for this signature in database
1 changed files with 13 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
Makefile
View File

@ -4,45 +4,34 @@
SIM = ${WALLY}/sim SIM = ${WALLY}/sim
all: .PHONY: all riscof testfloat zsbl benchmarks coremark embench coverage clean
make riscof
make zsbl all: riscof testfloat zsbl coverage # benchmarks
make testfloat
# make verify
make coverage
# make benchmarks
# riscof builds the riscv-arch-test and wally-riscv-arch-test suites # riscof builds the riscv-arch-test and wally-riscv-arch-test suites
riscof: riscof:
make -C sim $(MAKE) -C sim
testfloat: testfloat:
cd ${WALLY}/addins/SoftFloat-3e/build/Linux-x86_64-GCC; make $(MAKE) -C ${WALLY}/addins/SoftFloat-3e/build/Linux-x86_64-GCC
cd ${WALLY}/addins/TestFloat-3e/build/Linux-x86_64-GCC; make $(MAKE) -C ${WALLY}/addins/TestFloat-3e/build/Linux-x86_64-GCC
cd ${WALLY}/tests/fp; ./create_all_vectors.sh cd ${WALLY}/tests/fp && ./create_all_vectors.sh
zsbl: zsbl:
$(MAKE) -C ${WALLY}/fpga/zsbl $(MAKE) -C ${WALLY}/fpga/zsbl
verify:
cd ${SIM}; ./regression-wally
cd ${SIM}/sim; ./sim-testfloat-batch all
make imperasdv
benchmarks: benchmarks:
make coremark $(MAKE) coremark
make embench $(MAKE) embench
coremark: coremark:
cd ${WALLY}/benchmarks/coremark; make; make run cd ${WALLY}/benchmarks/coremark; $(MAKE); #$(MAKE) run
embench: embench:
cd ${WALLY}/benchmarks/embench; make; make run cd ${WALLY}/benchmarks/embench; $(MAKE); #$(MAKE) run
coverage: coverage:
make -C tests/coverage $(MAKE) -C tests/coverage
clean: clean:
make clean -C sim $(MAKE) clean -C sim