diff --git a/wally-pipelined/bin/extractFunctionRadix.sh b/wally-pipelined/bin/extractFunctionRadix.sh
index d7c6b08b9..5fe09fc5b 100755
--- a/wally-pipelined/bin/extractFunctionRadix.sh
+++ b/wally-pipelined/bin/extractFunctionRadix.sh
@@ -65,20 +65,22 @@ function processProgram {
 
     # need to add some formatting to each line
     local numLines=`echo "$listOfAddr" | wc -l`
-    local prefix=`yes "    16#" | head -n  $numLines`
-    local midfix=`yes "# " | head -n $numLines`
+    #local prefix=`yes "    16#" | head -n  $numLines`
+    #local midfix=`yes "# " | head -n $numLines`
 
+    # old version which used a modelsim radix    
     # paste echos each of the 4 parts on a per line basis.
     #-d'\0' sets no delimiter
-    local temp=`paste -d'\0' <(echo "$prefix") <(echo "$addresses") <(echo "$midfix") <(echo "$labels")`
+    #local temp=`paste -d'\0' <(echo "$prefix") <(echo "$addresses") <(echo "$midfix") <(echo "$labels")`
+    
 
     # remove the last comma
-    local temp2=${temp::-1}
+    #local temp2=${temp::-1}
 
-    echo "radix define Functions {" > $objDumpFile.do
-    echo "$temp2" >> $objDumpFile.do
-    echo "    -default hex -color green" >> $objDumpFile.do
-    echo "}" >> $objDumpFile.do
+    #echo "radix define Functions {" > $objDumpFile.do
+    #echo "$temp2" >> $objDumpFile.do
+    #echo "    -default hex -color green" >> $objDumpFile.do
+    #echo "}" >> $objDumpFile.do
 
     # now create the all in one version
     # put the index at the begining of each line
@@ -91,8 +93,8 @@ function processProgram {
     local allAddresses=`paste -d'\0' <(printf "%s" "$copyIndex") <(echo "$addresses")`
     printf "%s\n" "$allAddresses" >> ${allProgramRadixFile}_$numBits.addr
 
-    local allAddressesTemp=`paste -d'\0' <(echo "$prefix") <(echo "$allAddresses") <(echo "$midfix") <(echo "$labels")`
-    printf "%s\n" "$allAddressesTemp" >> $allProgramRadixFile.do
+    #local allAddressesTemp=`paste -d'\0' <(echo "$prefix") <(echo "$allAddresses") <(echo "$midfix") <(echo "$labels")`
+    #printf "%s\n" "$allAddressesTemp" >> $allProgramRadixFile.do
 
     return 0
 }
@@ -103,9 +105,10 @@ programToIndexMap="ProgramMap.txt"
 index=0
 
 # clear the files
-rm -rf ${allProgramRadixFile}_32.addr ${allProgramRadixFile}_64.addr $allProgramRadixFile.do $programToIndexMap
+#rm -rf ${allProgramRadixFile}_32.addr ${allProgramRadixFile}_64.addr $allProgramRadixFile.do $programToIndexMap
+rm -rf $programToIndexMap
 
-echo "radix define Functions {" > $allProgramRadixFile.do
+#echo "radix define Functions {" > $allProgramRadixFile.do
 
 for objDumpFile in "$@";
 do
@@ -124,9 +127,9 @@ done
 
 # remove the last comma from the all radix
 # '$ selects the last line
-sed -i '$ s/,$//g' $allProgramRadixFile.do
+#sed -i '$ s/,$//g' $allProgramRadixFile.do
 
-echo "}" >> $allProgramRadixFile.do
+#echo "}" >> $allProgramRadixFile.do
 
 exit 0
 
diff --git a/wally-pipelined/regression/wave.do b/wally-pipelined/regression/wave.do
index d3be0b8f2..c37d657bb 100644
--- a/wally-pipelined/regression/wave.do
+++ b/wally-pipelined/regression/wave.do
@@ -1,38 +1,51 @@
+onerror {resume}
 quietly WaveActivateNextPane {} 0
 add wave -noupdate /testbench/clk
 add wave -noupdate /testbench/reset
 add wave -noupdate /testbench/test
 add wave -noupdate -radix ascii /testbench/memfilename
+add wave -noupdate -expand -group {Execution Stage} /testbench/functionRadix/function_radix/FunctionName
 add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/PCE
 add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName
 add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
-add wave -noupdate -divider <NULL>
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/RetM
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/TrapM
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/InstrStall
-add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/DataStall
-add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
-add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
-add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
-add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushM
-add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW
-add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
-add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/RetM
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/TrapM
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/InstrStall
+add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/DataStall
+add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
+add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
+add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
+add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushM
+add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW
+add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
+add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
 add wave -noupdate -group Bpred -expand -group direction -divider Update
 add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePC
 add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdateEN
 add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePCIndex
 add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePrediction
 add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
-add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassE
-add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrF
-add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD
-add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE
-add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM
-add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredWrongE
+add wave -noupdate -group Bpred -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE
+add wave -noupdate -group Bpred -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE
+add wave -noupdate -group Bpred -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE
+add wave -noupdate -group Bpred -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE
+add wave -noupdate -group Bpred -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE
+add wave -noupdate -group Bpred -group {bp wrong} /testbench/dut/hart/ifu/bpred/InstrClassE
+add wave -noupdate -group Bpred -group BTB -divider Update
+add wave -noupdate -group Bpred -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateEN
+add wave -noupdate -group Bpred -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePC
+add wave -noupdate -group Bpred -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateTarget
+add wave -noupdate -group Bpred -group BTB -divider Lookup
+add wave -noupdate -group Bpred -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/TargetPC
+add wave -noupdate -group Bpred -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/Valid
+add wave -noupdate -group Bpred /testbench/dut/hart/ifu/bpred/BPPredWrongE
+add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrF
+add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD
+add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE
+add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM
 add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNextF
 add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCF
 add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCPlus2or4F
@@ -42,30 +55,12 @@ add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext1F
 add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/SelBPPredF
 add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredWrongE
 add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PrivilegedChangePCM
-add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/ValidBits
-add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredF
-add wave -noupdate /testbench/dut/hart/ifu/bpred/BTBValidF
-add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPCIndexQ
-add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePCIndexQ
-add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPC
-add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE
-add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE
-add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE
-add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE
-add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE
-add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/InstrClassE
-add wave -noupdate -group BTB -divider Update
-add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateEN
-add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePC
-add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateTarget
-add wave -noupdate -group BTB -divider Lookup
-add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/TargetPC
-add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/Valid
-add wave -noupdate /testbench/dut/hart/ifu/bpred/BTBPredPCF
-add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/TargetPC
-add wave -noupdate /testbench/dut/hart/ifu/bpred/CorrectPCE
-add wave -noupdate /testbench/dut/hart/ifu/bpred/FlushF
-add wave -noupdate /testbench/dut/hart/FlushF
+add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ifu/InstrD
+add wave -noupdate -group {Decode Stage} /testbench/InstrDName
+add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/c/RegWriteD
+add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/RdD
+add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs1D
+add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs2D
 add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rf
 add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/a1
 add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/a2
@@ -80,18 +75,23 @@ add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/
 add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW
 add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW
 add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW
-add wave -noupdate /testbench/dut/hart/ieu/c/RegWriteE
-add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ifu/InstrD
-add wave -noupdate -group {Decode Stage} /testbench/InstrDName
-add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/c/RegWriteD
-add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/RdD
-add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs1D
-add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs2D
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/a
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/b
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/alucontrol
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/result
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/flags
+add wave -noupdate -expand -group alu -divider internals
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/overflow
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/carry
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/zero
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/neg
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/lt
+add wave -noupdate -expand -group alu /testbench/dut/hart/ieu/dp/alu/ltu
 add wave -noupdate /testbench/InstrFName
-add wave -noupdate -expand -group dcache /testbench/dut/hart/MemAdrM
-add wave -noupdate -expand -group dcache /testbench/dut/hart/MemPAdrM
-add wave -noupdate -expand -group dcache /testbench/dut/hart/WriteDataM
-add wave -noupdate -expand -group dcache /testbench/dut/hart/dmem/MemRWM
+add wave -noupdate -group dcache /testbench/dut/hart/MemAdrM
+add wave -noupdate -group dcache /testbench/dut/hart/MemPAdrM
+add wave -noupdate -group dcache /testbench/dut/hart/WriteDataM
+add wave -noupdate -group dcache /testbench/dut/hart/dmem/MemRWM
 add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1D
 add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2D
 add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1E
@@ -105,28 +105,33 @@ add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteW
 add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardAE
 add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardBE
 add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/LoadStallD
-add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/WriteDataE
-add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/ALUResultE
-add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcAE
-add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcBE
+add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/WriteDataE
+add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/ALUResultE
+add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcAE
+add wave -noupdate -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcBE
 add wave -noupdate /testbench/dut/hart/ieu/dp/ALUResultM
-add wave -noupdate /testbench/functionRadix/function_radix/FunctionAddr
-add wave -noupdate /testbench/functionRadix/function_radix/reset
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramLabelMapLineCount
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramLabelMapLine
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramLabelMapFP
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramLabelMapFile
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramAddrMapLineCount
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramAddrMapLine
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramAddrMapFP
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramAddrMapFile
-add wave -noupdate /testbench/functionRadix/function_radix/pc
-add wave -noupdate /testbench/functionRadix/function_radix/FunctionName
-add wave -noupdate /testbench/functionRadix/function_radix/FunctionAddr
-add wave -noupdate /testbench/functionRadix/function_radix/ProgramAddrIndex
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/FunctionAddr
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/reset
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramLabelMapLineCount
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramLabelMapLine
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramLabelMapFP
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramLabelMapFile
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramAddrMapLineCount
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramAddrMapLine
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramAddrMapFP
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramAddrMapFile
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/pc
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/FunctionAddr
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/ProgramAddrIndex
+add wave -noupdate -group {function radix debug} /testbench/functionRadix/function_radix/FunctionName
+add wave -noupdate -expand -group PCS /testbench/dut/hart/PCF
+add wave -noupdate -expand -group PCS /testbench/dut/hart/ifu/PCD
+add wave -noupdate -expand -group PCS /testbench/dut/hart/PCE
+add wave -noupdate -expand -group PCS /testbench/dut/hart/PCM
+add wave -noupdate -expand -group PCS /testbench/dut/hart/ifu/PCW
 TreeUpdate [SetDefaultTree]
-WaveRestoreCursors {{Cursor 2} {1091 ns} 0} {{Cursor 3} {5926044 ns} 0}
-quietly wave cursor active 1
+WaveRestoreCursors {{Cursor 2} {3758805 ns} 0} {{Cursor 3} {4351471 ns} 0}
+quietly wave cursor active 2
 configure wave -namecolwidth 250
 configure wave -valuecolwidth 229
 configure wave -justifyvalue left
@@ -141,4 +146,4 @@ configure wave -griddelta 40
 configure wave -timeline 0
 configure wave -timelineunits ns
 update
-WaveRestoreZoom {0 ns} {105 us}
+WaveRestoreZoom {4351320 ns} {4351862 ns}
diff --git a/wally-pipelined/src/ifu/bpred.sv b/wally-pipelined/src/ifu/bpred.sv
index 613120c0a..35ac6cfb5 100644
--- a/wally-pipelined/src/ifu/bpred.sv
+++ b/wally-pipelined/src/ifu/bpred.sv
@@ -124,30 +124,30 @@ module bpred
   
   flopenrc #(2) BPPredRegD(.clk(clk),
 			   .reset(reset),
-			   .en(~StallF),
-			   .clear(FlushF),
+			   .en(~StallD),
+			   .clear(FlushD),
 			   .d(BPPredF),
 			   .q(BPPredD));
 
   flopenrc #(2) BPPredRegE(.clk(clk),
 			   .reset(reset),
-			   .en(~StallD),
-			   .clear(FlushD),
+			   .en(~StallE),
+			   .clear(FlushE),
 			   .d(BPPredD),
 			   .q(BPPredE));
 
   // pipeline the class
   flopenrc #(4) InstrClassRegD(.clk(clk),
 			       .reset(reset),
-			       .en(~StallF),
-			       .clear(FlushF),
+			       .en(~StallD),
+			       .clear(FlushD),
 			       .d(BPInstrClassF),
 			       .q(BPInstrClassD));
 
   flopenrc #(4) InstrClassRegE(.clk(clk),
 			       .reset(reset),
-			       .en(~StallD),
-			       .clear(FlushD),
+			       .en(~StallE),
+			       .clear(FlushE),
 			       .d(BPInstrClassD),
 			       .q(BPInstrClassE));
 
diff --git a/wally-pipelined/src/ifu/ifu.sv b/wally-pipelined/src/ifu/ifu.sv
index 323c63e1b..815ad8407 100644
--- a/wally-pipelined/src/ifu/ifu.sv
+++ b/wally-pipelined/src/ifu/ifu.sv
@@ -204,8 +204,8 @@ module ifu (
 
   flopenrc #(4) InstrClassRegE(.clk(clk),
 			       .reset(reset),
-			       .en(~StallD),
-			       .clear(FlushD),
+			       .en(~StallE),
+			       .clear(FlushE),
 			       .d(InstrClassD),
 			       .q(InstrClassE));