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light cleanup

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This commit is contained in:
Kip Macsai-Goren 2022-02-06 02:05:42 +00:00
parent c5b6f49b2f
commit 04197273f6
3 changed files with 4 additions and 4 deletions
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2
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-PMP.S
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@ -72,7 +72,7 @@
.8byte 0x0, 0x0018FF0C0009001F, write_pmpcfg_0 # attempt to edit only pmp5cfg (pmpcfg0[47:40]) after lockout.
# instruction ignored, output is 0x0018900C0009001F, NOT 0x0018FF0C0009001F
.8byte 0x5, 0xFFFFFFFF, write_pmpaddr_5 # attempt to edit pmpaddr5 after lockout.
# instruction ignored, output is 0x80100300, NOT 0xFFFFFFFF
# instruction ignored, output is 0x200400c0, NOT 0xFFFFFFFF
# Test 12.3.2.2.2 Machine mode access

4
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-TEST-MACROS-64.h
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@ -478,9 +478,9 @@ begin_test: // label here to jump to so we dont go through the trap handler befo
csrwi \CSR\(), 0xA // Attempt to write a 'random' value to the CSR
csrr x30, \CSR
bne x30, x29, 1f // 1f represents write_access
li x30, 0x11 // Write succeeded, violating read only permissions.
li x30, 0x11 // Write failed, confirming read only permissions.
j 2f // j r_access_end
1: // w_access (test failed)
1: // w_access (write succeeded, violating read-only)
li x30, 0xBAD
2: // r_access end
sd x30, 0(x6)

2
tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-minfo-01.S
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@ -25,7 +25,7 @@
INIT_TESTS
// Test 5.2.3.1: tersting Read-only access to Machine info CSRs
// Test 5.2.3.1: testing Read-only access to Machine info CSRs
csr_r_access mvendorid
csr_r_access marchid