diff --git a/src/fpu/fclassify.sv b/src/fpu/fclassify.sv
index 62b850d7f..1a8f0fc19 100644
--- a/src/fpu/fclassify.sv
+++ b/src/fpu/fclassify.sv
@@ -33,7 +33,7 @@ module fclassify import cvw::*;  #(parameter cvw_t P) (
   input  logic                XSubnorm,   // is Subnormal
   input  logic                XZero,      // is zero
   input  logic                XInf,       // is infinity
-  output logic [P.XLEN-1:0]    ClassRes    // classify result
+  output logic [P.XLEN-1:0]   ClassRes    // classify result
 );
 
   logic PInf, PZero, PNorm, PSubnorm;     // is the input a positive infinity/zero/normal/subnormal