diff --git a/pipelined/src/generic/flop/bram1p1rw_64x128wrap.sv b/pipelined/src/generic/flop/bram1p1rw_64x128wrap.sv
index 04bc3e762..2c436314e 100644
--- a/pipelined/src/generic/flop/bram1p1rw_64x128wrap.sv
+++ b/pipelined/src/generic/flop/bram1p1rw_64x128wrap.sv
@@ -16,6 +16,12 @@ module bram1p1rw_64x128wrap
 	   input logic [DATA_WIDTH-1:0]  din
 	   );
 
+  logic                              we2;
+  logic [NUM_COL-1:0]                bwe2;
+  logic [ADDR_WIDTH-1:0]             addr2;
+  logic [DATA_WIDTH-1:0]             dout2;
+  logic [DATA_WIDTH-1:0]             din2;
+
     always_ff @(posedge clk) begin 
         we2 <= we;
         bwe2 <= bwe;