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https://github.com/openhwgroup/cvw
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Seventeen Square Root Tests
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parent
425fec0f41
commit
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@ -1,7 +1,8 @@
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all: exptestgen testgen qslc_r4a2 qslc_r4a2b qslc_sqrt_r4a2
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all: exptestgen testgen qslc_r4a2 qslc_r4a2b qslc_sqrt_r4a2 sqrttestgen
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sqrttestgen: sqrttestgen.c
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sqrttestgen: sqrttestgen.c
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gcc sqrttestgen.c -o sqrttestgen -lm
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gcc sqrttestgen.c -o sqrttestgen -lm
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./sqrttestgen
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testgen: testgen.c
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testgen: testgen.c
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gcc testgen.c -o testgen -lm
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gcc testgen.c -o testgen -lm
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@ -28,5 +29,5 @@ inttestgen: inttestgen.c
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./inttestgen
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./inttestgen
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clean:
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clean:
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rm -f testgen exptestgen qslc_r4a2 qslc_r4a2b qslc_sqrt_r4a2
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rm -f testgen exptestgen qslc_r4a2 qslc_r4a2b qslc_sqrt_r4a2 sqrttestgen
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Binary file not shown.
@ -19,7 +19,7 @@
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/* Prototypes */
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/* Prototypes */
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void output(FILE *fptr, double a, double r);
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void output(FILE *fptr, int aExp, double aFrac, int rExp, double rFrac);
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void printhex(FILE *fptr, double x);
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void printhex(FILE *fptr, double x);
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double random_input(void);
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double random_input(void);
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@ -28,12 +28,16 @@ double random_input(void);
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void main(void)
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void main(void)
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{
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{
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FILE *fptr;
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FILE *fptr;
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double a, b, r;
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double aFrac, rFrac;
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double list[ENTRIES] = {1, 1.5, 1.25, 1.125, 1.0625,
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int aExp, rExp;
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double mans[ENTRIES] = {1, 1.5, 1.25, 1.125, 1.0625,
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1.75, 1.875, 1.99999,
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1.75, 1.875, 1.99999,
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1.1, 1.2, 1.01, 1.001, 1.0001,
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1.1, 1.2, 1.01, 1.001, 1.0001,
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1/1.1, 1/1.5, 1/1.25, 1/1.125};
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1/1.1, 1/1.5, 1/1.25, 1/1.125};
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int i, j;
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double exps[ENTRIES] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
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11, 12, 13, 14, 15, 16};
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int i;
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int bias = 1023;
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if ((fptr = fopen("sqrttestvectors","w")) == NULL) {
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if ((fptr = fopen("sqrttestvectors","w")) == NULL) {
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fprintf(stderr, "Couldn't write sqrttestvectors file\n");
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fprintf(stderr, "Couldn't write sqrttestvectors file\n");
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@ -41,28 +45,31 @@ void main(void)
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}
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}
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for (i=0; i<ENTRIES; i++) {
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for (i=0; i<ENTRIES; i++) {
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a = list[i];
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aFrac = mans[i];
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r = sqrt(a);
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aExp = exps[i] + bias;
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output(fptr, a, r);
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rFrac = sqrt(aFrac * pow(2, aExp - bias));
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rExp = (int) (log(rFrac)/log(2) + bias);
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output(fptr, aExp, aFrac, rExp, rFrac);
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}
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}
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for (i = 0; i< RANDOM_VECS; i++) {
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// for (i = 0; i< RANDOM_VECS; i++) {
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a = random_input();
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// a = random_input();
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r = sqrt(a);
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// r = sqrt(a);
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output(fptr, a, r);
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// output(fptr, a, r);
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}
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// }
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fclose(fptr);
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fclose(fptr);
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}
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}
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/* Functions */
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/* Functions */
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void output(FILE *fptr, double a, double r)
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void output(FILE *fptr, int aExp, double aFrac, int rExp, double rFrac)
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{
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{
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printf("sqrt(%lf) = %lf\n", a, r);
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fprintf(fptr, "%03x", aExp);
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printhex(fptr, a);
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printhex(fptr, aFrac);
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fprintf(fptr, "_");
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fprintf(fptr, "_");
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printhex(fptr, r);
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fprintf(fptr, "%03x", rExp);
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printhex(fptr, rFrac);
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fprintf(fptr, "\n");
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fprintf(fptr, "\n");
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@ -118,12 +118,11 @@ module testbench;
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// Apply directed test vectors read from file.
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// Apply directed test vectors read from file.
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always @(posedge clk)
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always @(posedge clk) begin
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begin
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r = Quot[(`DIVLEN - 1):(`DIVLEN - 52)];
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r = Quot[(`DIVLEN - 1):(`DIVLEN - 52)];
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rInt = Quot;
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rInt = Quot;
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if (done) begin
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if (done) begin
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if (~Int & ~Sqrt) begin
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if (~Int) begin
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req <= #5 1;
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req <= #5 1;
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diffp = correctr[51:0] - r;
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diffp = correctr[51:0] - r;
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diffn = r - correctr[51:0];
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diffn = r - correctr[51:0];
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@ -139,24 +138,38 @@ module testbench;
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$display("%d Tests completed successfully", testnum);
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$display("%d Tests completed successfully", testnum);
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$stop;
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$stop;
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end
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end
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end else begin
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end else if (~Sqrt) begin
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req <= #5 1;
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req <= #5 1;
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diffp = correctr[63:0] - rInt;
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diffp = correctr[63:0] - rInt;
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diffn = rInt - correctr[63:0];
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diffn = rInt - correctr[63:0];
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if (($signed(diffn) > 1) | ($signed(diffp) > 1) | (diffn === 64'bx) | (diffp === 64'bx)) // check if accurate to 1 ulp
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if (($signed(diffn) > 1) | ($signed(diffp) > 1) | (diffn === 64'bx) | (diffp === 64'bx)) // check if accurate to 1 ulp
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begin
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errors = errors+1;
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$display("result was %h, should be %h %h %h\n", rInt, correctr, diffn, diffp);
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$display("failed\n");
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$stop;
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end
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if (afrac === 52'hxxxxxxxxxxxxx)
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begin
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begin
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$display("%d Tests completed successfully", testnum);
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errors = errors+1;
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$display("result was %h, should be %h %h %h\n", rInt, correctr, diffn, diffp);
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$display("failed\n");
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$stop;
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$stop;
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end
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end
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end
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if (afrac === 52'hxxxxxxxxxxxxx)
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begin
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$display("%d Tests completed successfully", testnum);
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$stop;
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end
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end else begin
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req <= #5 1;
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diffp = correctr[51:0] - r;
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diffn = r - correctr[51:0];
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if (($signed(diffn) > 1) | ($signed(diffp) > 1) | (diffn === 64'bx) | (diffp === 64'bx)) // check if accurate to 1 ulp
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begin
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errors = errors + 1;
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$display("result was %h, should be %h %h %h\n", rSqrt, correctr, diffn, diffp);
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$display("failed\n");
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$stop;
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end
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if (afrac === 52'hxxxxxxxxxxxxx) begin
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$display("%d Tests completed successfully", testnum);
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$stop; end
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end
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end
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end
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if (req) begin
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if (req) begin
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req <= #5 0;
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req <= #5 0;
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correctr = nextr;
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correctr = nextr;
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@ -169,7 +182,6 @@ module testbench;
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{bsign, bExp, bfrac} = b;
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{bsign, bExp, bfrac} = b;
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nextr = Vec[`memr];
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nextr = Vec[`memr];
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end
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end
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end
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end
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endmodule
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endmodule
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