diff --git a/sim/bpred-sim.py b/sim/bpred-sim.py index 3c5aa2d5a..1ec8b3045 100755 --- a/sim/bpred-sim.py +++ b/sim/bpred-sim.py @@ -46,31 +46,18 @@ configs = [ ) ] -configOptions = "+define+INSTR_CLASS_PRED=0 +define+BPRED_TYPE=\"BP_TWOBIT\" +define+BPRED_SIZE=6" -tc = TestCase( - name="twobit6", - variant="rv32gc", - cmd="vsim > {} -c < {} -c < {} -c < {} -c <