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Added missing signal declaration for SPI.

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This commit is contained in:
Rose Thompson 2024-09-05 12:20:06 -07:00
parent 4e2e922c39
commit 005ea52b72
1 changed files with 1 additions and 2 deletions
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src/uncore/spi_apb.sv
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@ -152,8 +152,7 @@ module spi_apb import cvw::*; #(parameter cvw_t P) (
logic SCLKenableEarly; // SCLKenable 1 PCLK cycle early, needed for on time register changes when ChipSelectMode is hold and Delay1[15:8] (InterXFR delay) is 0
logic ReceiveFiFoTakingData;
// APB access
assign Entry = {PADDR[7:2],2'b00}; // 32-bit word-aligned accesses