mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-27 15:04:36 +00:00
Missing a file. Last commit will fail.
This commit is contained in:
parent
0106777f02
commit
00218d559f
36
pipelined/src/generic/binencoder.sv
Normal file
36
pipelined/src/generic/binencoder.sv
Normal file
@ -0,0 +1,36 @@
|
||||
///////////////////////////////////////////
|
||||
// prioritythermometer.sv
|
||||
//
|
||||
// Written: ross1728@gmail.com November 14, 2022
|
||||
//
|
||||
// Purpose: one-hot to binary encoding.
|
||||
//
|
||||
// A component of the Wally configurable RISC-V project.
|
||||
//
|
||||
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
|
||||
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
|
||||
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
|
||||
// is furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
||||
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
||||
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
|
||||
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
///////////////////////////////////////////
|
||||
|
||||
module binencoder #(parameter N = 8) (
|
||||
input logic [N-1:0] A,
|
||||
output logic [$clog2(N)-1:0] Y);
|
||||
|
||||
integer index;
|
||||
always_comb begin
|
||||
Y = 0;
|
||||
for(index = 0; index < N; index++)
|
||||
if(A[index] == 1'b1) Y = index[$clog2(N)-1:0];
|
||||
end
|
||||
|
||||
endmodule
|
Loading…
Reference in New Issue
Block a user