mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-24 05:24:49 +00:00
25 lines
1.3 KiB
Bash
25 lines
1.3 KiB
Bash
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#!/bin/bash
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# Set CONFIG_VARIANT from the first script argument
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#CONFIG_VARIANT=${1:-rv64i}
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CONFIG_VARIANT=${1}
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# Set TESTSUITE from the second script argument
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TESTSUITE=$2
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INCLUDE_DIRS=$(find ../src -type d | xargs -I {} echo -n "{} ")
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SOURCE_PATH="+incdir+../config/${CONFIG_VARIANT} +incdir+../config/deriv/${CONFIG_VARIANT} +incdir+../config/shared +define+ +define+P.XLEN=64 +define+FPGA=0 +incdir+../testbench ../src/cvw.sv +incdir+../src"
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SIMFILES="$INCLUDE_DIRS $(find ../src -name "*.sv" ! -path "../src/generic/clockgater.sv" ! -path "../src/generic/mem/rom1p1r_128x64.sv" ! -path "../src/generic/mem/ram2p1r1wbe_128x64.sv" ! -path "../src/generic/mem/rom1p1r_128x32.sv" ! -path "../src/generic/mem/ram2p1r1wbe_512x64.sv") ../testbench/testbench.sv $(find ../testbench/common -name "*.sv" ! -path "../testbench/common/wallyTracer.sv")"
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OUTPUT="sim_out"
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clean() {
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rm -rf obj_dir work transcript vsim.wlf $OUTPUT *.vcd csrc ucli.key vc_hdrs.h program.out
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rm -rf simv* *.daidir dve *.vpd *.dump DVEfiles/ verdi* novas* *fsdb* *.vg *.rep *.db *.chk *.log *.out profileReport* simprofile_dir*
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}
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# Clean and run simulation with VCS
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clean
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vcs +lint=all,noGCWM -simprofile -sverilog +vc -Mupdate -line -full64 -kdb -lca -debug_access+all+reverse -v2k_generate ${SOURCE_PATH} +define+TEST=$TESTSUITE $SIMFILES -o $OUTPUT -error=NOODV
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./$OUTPUT | tee program.out
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