2023-01-22 03:31:47 +00:00
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#!/bin/bash
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2023-01-22 18:53:23 +00:00
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###########################################
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2023-01-22 19:04:31 +00:00
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## Tool chain install script.
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2023-01-22 18:53:23 +00:00
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##
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## Written: Ross Thompson ross1728@gmail.com
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## Created: 18 January 2023
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## Modified: 22 January 2023
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2023-03-23 14:20:35 +00:00
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## Modified: 23 March 2023
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2023-01-22 18:53:23 +00:00
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##
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## Purpose: Open source tool chain installation script
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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2023-01-22 03:31:47 +00:00
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2023-03-23 14:20:35 +00:00
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# Use /opt/riscv for installation - may require running script with sudo
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2023-01-22 03:31:47 +00:00
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export RISCV="${1:-/opt/riscv}"
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2023-05-10 15:23:55 +00:00
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export PATH=$PATH:$RISCV/bin:/usr/bin
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2023-01-21 20:03:30 +00:00
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2023-01-22 00:00:14 +00:00
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set -e # break on error
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2023-03-23 14:20:35 +00:00
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# Modify accordingly for your machine
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2023-03-23 16:05:37 +00:00
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# Increasing NUM_THREADS will speed up parallel compilation of the tools
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2023-03-24 00:24:58 +00:00
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#NUM_THREADS=2 # for low memory machines > 16GiB
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NUM_THREADS=8 # for >= 32GiB
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#NUM_THREADS=16 # for >= 64GiB
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2023-01-21 23:32:44 +00:00
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sudo mkdir -p $RISCV
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# *** need to update permissions to local user
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2023-03-23 16:05:37 +00:00
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# Update and Upgrade tools (see https://itsfoss.com/apt-update-vs-upgrade/)
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sudo apt update -y
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sudo apt upgrade -y
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2023-06-09 16:37:09 +00:00
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sudo apt install -y git gawk make texinfo bison flex build-essential python3 libz-dev libexpat-dev autoconf device-tree-compiler ninja-build libpixman-1-dev ncurses-base ncurses-bin libncurses5-dev dialog curl wget ftp libgmp-dev libglib2.0-dev python3-pip pkg-config opam z3 zlib1g-dev automake autotools-dev libmpc-dev libmpfr-dev gperf libtool patchutils bc
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2023-03-23 16:31:17 +00:00
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# Other python libraries used through the book.
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sudo pip3 install matplotlib scipy scikit-learn adjustText lief
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2023-01-22 00:00:14 +00:00
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2023-01-22 03:23:23 +00:00
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# needed for Ubuntu 22.04, gcc cross compiler expects python not python2 or python3.
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if ! command -v python &> /dev/null
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then
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echo "WARNING: python3 was installed as python3 rather than python. Creating symlink."
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sudo ln -sf /usr/bin/python3 /usr/bin/python
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fi
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2023-03-23 14:20:35 +00:00
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# gcc cross-compiler (https://github.com/riscv-collab/riscv-gnu-toolchain)
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# To install GCC from source can take hours to compile.
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2023-05-14 10:41:35 +00:00
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# This configuration enables multilib to target many flavors of RISC-V.
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# This book is tested with GCC 12.2 (tagged 2023.01.31), but will likely work with newer versions as well.
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# Note that GCC12.2 has binutils 2.39, which has a known performance bug that causes
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# objdump to run 100x slower than in previous versions, causing riscof to make versy slowly.
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# However GCC12.x is needed for bit manipulation instructions. There is an open issue to fix this:
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# https://github.com/riscv-collab/riscv-gnu-toolchain/issues/1188
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2023-01-21 23:32:44 +00:00
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cd $RISCV
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git clone https://github.com/riscv/riscv-gnu-toolchain
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cd riscv-gnu-toolchain
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# Temporarily use the following commands until gcc-13 is part of riscv-gnu-toolchain (issue #1249)
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git clone https://github.com/gcc-mirror/gcc -b releases/gcc-13 gcc-13
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./configure --prefix=/opt/riscv --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" --with-gcc-src=`pwd`/gcc-13
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#./configure --prefix=${RISCV} --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;"
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2023-01-22 03:23:23 +00:00
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make -j ${NUM_THREADS}
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2023-03-23 14:20:35 +00:00
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# elf2hex (https://github.com/sifive/elf2hex)
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#The elf2hex utility to converts executable files into hexadecimal files for Verilog simulation.
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# Note: The exe2hex utility that comes with Spike doesn’t work for our purposes because it doesn’t
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# handle programs that start at 0x80000000. The SiFive version above is touchy to install.
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# For example, if Python version 2.x is in your path, it won’t install correctly.
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# Also, be sure riscv64-unknown-elf-objcopy shows up in your path in $RISCV/riscv-gnu-toolchain/bin
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# at the time of compilation, or elf2hex won’t work properly.
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cd $RISCV
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2023-03-20 16:52:10 +00:00
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export PATH=$RISCV/bin:$PATH
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2023-01-21 23:24:21 +00:00
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git clone https://github.com/sifive/elf2hex.git
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cd elf2hex
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autoreconf -i
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./configure --target=riscv64-unknown-elf --prefix=$RISCV
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make
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make install
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2023-03-23 14:20:35 +00:00
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# QEMU (https://www.qemu.org/docs/master/system/target-riscv.html)
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cd $RISCV
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git clone --recurse-submodules https://github.com/qemu/qemu
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cd qemu
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./configure --target-list=riscv64-softmmu --prefix=$RISCV
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make -j ${NUM_THREADS}
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make install
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# Spike (https://github.com/riscv-software-src/riscv-isa-sim)
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2023-03-23 16:33:56 +00:00
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# Spike also takes a while to install and compile, but this can be done concurrently
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#with the GCC installation. After the build, we need to change two Makefiles to support atomic instructions.
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cd $RISCV
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git clone https://github.com/riscv-software-src/riscv-isa-sim
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2023-01-22 02:52:58 +00:00
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mkdir -p riscv-isa-sim/build
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cd riscv-isa-sim/build
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../configure --prefix=$RISCV
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make -j ${NUM_THREADS}
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make install
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cd ../arch_test_target/spike/device
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sed -i 's/--isa=rv32ic/--isa=rv32iac/' rv32i_m/privilege/Makefile.include
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sed -i 's/--isa=rv64ic/--isa=rv64iac/' rv64i_m/privilege/Makefile.include
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2023-01-21 20:03:30 +00:00
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2023-06-09 16:37:09 +00:00
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# Wally needs Verilator 5.0 or later.
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# Verilator needs to be built from scratch to get the latest version
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# apt-get install verilator installs version 4.028 as of 6/8/23
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sudo apt-get install -y perl g++ ccache help2man libgoogle-perftools-dev numactl perl-doc zlibc zlib1g
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sudo apt-get install -y libfl2 libfl-dev # Ubuntu only (ignore if gives error)
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cd $RISCV
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git clone https://github.com/verilator/verilator # Only first time
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unsetenv VERILATOR_ROOT # For csh; ignore error if on bash
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unset VERILATOR_ROOT # For bash
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cd verilator
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git pull # Make sure git repository is up-to-date
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git checkout master # Use development branch (e.g. recent bug fixes)
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autoconf # Create ./configure script
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./configure # Configure and create Makefile
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make -j NUM_THREADS # Build Verilator itself (if error, try just 'make')
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sudo make install
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2023-03-23 14:20:35 +00:00
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# Sail (https://github.com/riscv/sail-riscv)
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2023-03-23 16:33:56 +00:00
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# Sail is the new golden reference model for RISC-V. Sail is written in OCaml, which
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# is an object-oriented extension of ML, which in turn is a functional programming
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# language suited to formal verification. OCaml is installed with the opam OCcaml
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# package manager. Sail has so many dependencies that it can be difficult to install.
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# This script works for Ubuntu.
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2023-03-23 16:33:56 +00:00
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# Do these commands only for RedHat / Rocky 8 to build from source.
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#cd $RISCV
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#git clone https://github.com/Z3Prover/z3.git
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#cd z3
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#python scripts/mk_make.py
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#cd build
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#make -j ${NUM_THREADS}
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#make install
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#cd ../..
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#pip3 install chardet==3.0.4
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#pip3 install urllib3==1.22
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2023-05-10 15:23:55 +00:00
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cd $RISCV
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opam init -y --disable-sandboxing
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opam switch create ocaml-base-compiler.4.08.0
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opam install sail -y
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eval $(opam config env)
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git clone https://github.com/riscv/sail-riscv.git
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cd sail-riscv
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make -j ${NUM_THREADS}
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2023-03-21 13:36:30 +00:00
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ARCH=RV32 make -j ${NUM_THREADS}
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sudo ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV64 /usr/bin/riscv_sim_RV64
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sudo ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV32 /usr/bin/riscv_sim_RV32
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sudo pip3 install testresources
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pip3 install git+https://github.com/riscv/riscof.git
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