mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-24 05:24:49 +00:00
5 lines
91 B
Makefile
5 lines
91 B
Makefile
|
all:
|
||
|
./covergen.py
|
||
|
cd ../riscof; make wally-riscv-arch-test
|
||
|
cd ../../sim; make memfiles
|